From Intel 64 and IA-32 Architectues Software Developer's Manual
Volume 2 (2A, 2B & 2C): Instruction Set Reference, A-Z
CVTSI2SD - Convert Dword Integer to Scalar Double-Precision FP value
Opcode/ Op 64/32-bit CPUID Description
Instruction /En Mode Feature
Flag
F2 0F 2A /r RM V/V SSE2 Convert one signed
CVTSI2SD xmm,r/m32 doubleword integer from
r/m32 to one double-
precision floating-point
value in xmm.
F2 REX.W 0F 2A /r RM V/N.E. SSE2 Convert one signed
CVTSI2SD xmm,r/m32 quadword integer from
r/m64 to one double-
precision floating-point
value in xmm.
VEX.NDS.LIG.F2.0F.W0 2A /r RM V/V AVX Convert one signed
VCVTSI2SD xmm,r/m32 doubleword integer from
r/m32 to one double-
precision floating-point
value in xmm1.
VEX.NDS.LIG.F2.0F.W1 2A /r RM V/V AVX Convert one signed
VCVTSI2SD xmm,r/m32 quadword integer from
r/m64 to one double-
precision floating-point
value in xmm1.
But looking that up made me realize that I overlooked the sse2
instruction (silly, silly), which solves my problem, because I can use
that one instead of the avx instruction.
Thanks to all for your tips and hints.
P.S.: Still wondering though, why there isn't an avx in the flags.
--
aen