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"Selective Victim Caching: A Method to Improve the ...

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Lisa Pascal

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Dec 16, 1994, 4:30:27 PM12/16/94
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University of California at Santa Cruz
Baskin Center for Computer Engineering and Information Sciences

The following technical report is available electronically or as
a paper copy. Instructions for getting either follow the abstract.

UCSC-CRL-93-41 (available electronically as ucsc-crl-93-41.ps.Z)

SELECTIVE VICTIM CACHING: A METHOD TO IMPROVE THE PERFORMANCE OF
DIRECT-MAPPED CACHES

Dimitrios Stiliadis and Anujan Varma

October 1994, 33 pages (Paper copy $7.00)

Abstract:

Although direct-mapped caches suffer from higher miss ratios as
compared to set-associative caches, they are attractive for today's
high-speed pipelined processors that require very low access times. Victim
caching was proposed by Jouppi (Jouppi-91) as an approach to improve the
miss rate of direct-mapped caches without affecting their access time. This
approach augments the direct-mapped main cache with a small fully-associate
cache, called victim cache, that stores cache blocks evicted from the main
cache as a result of replacements. We propose and evaluate an improvement
of this scheme, called `selective victim caching'. In this scheme, incoming
blocks into the first-level cache are placed selectively in the main cache
or a small victim cache by the use of a prediction scheme based on their
past history of use. In addition, interchanges of blocks between the main
cache and the victim cache are also performed selectively.

We show that the scheme results in significant improvements in miss rate
as well as the average memory access time, for both small and large caches
(4 Kbytes -- 128 Kbytes). For example, simulations with 10 instruction
traces from the SPEC '92 benchmark suite showed an average improvement of
approximately 21 percent in miss rate over simple victim caching for a
16-Kbyte cache with a block size of 32 bytes; the number of blocks
interchanged between the main and victim caches reduced by approximately
70 percent. Implementation alternatives for the scheme in an on-chip
processor cache are also described.

Keywords: Memory hierarchy, direct-mapped cache, victim cache,
selective victim caching, miss-ratio, effective access time.

This technical report is available electronically through either
of the following methods:
1. through anonymous ftp from ftp.cse.ucsc.edu, in /pub/tr. Log in
as "anonymous", use your email address as your password, specify
"binary" before getting the file. Uncompress before printing.
2. by mail to automatic mail server rna...@ftp.cse.ucsc.edu.
Put this command on the subject line or in the body of the message:
@@ send ucsc-crl-93-41.ps.Z from tr
To get the index or abstract list:
@@ send INDEX from tr
@@ send ABSTRACTS.1993 from tr
To get the list of the tr directory:
@@ list tr
To get the list of commands and their syntax:
@@ help commands

Order paper copies from: Technical Library, Baskin Center for Computer
Engineering & Information Sciences, UCSC, Santa Cruz CA 95064.
Purchase orders are not accepted. Checks or money orders must be
for U.S. dollars, payable through a U.S. bank, and made out to
"UC Regents".

Questions: t...@cse.ucsc.edu


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