IEEE International Workshop on Rapid System Prototyping (RSP 94)

[Apostolos Dollas]

PLEASE NOTE: For registration, information, etc. please contact
Ms. Jenny Zak (j...@rti.rti.org). For technical information
please contact Dr. Nick Kanopoulos (ni...@rti.rti.org).

IEEE INTERNATIONAL WORKSHOP ON
RAPID SYSTEM PROTOTYPING

June 21-23, 1994
Grenoble (Grand Hotel de Paris at
Villard de Lans), France

DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD

Program Committee Meeting Dinner

8:30 AM Registration Opens
10:00 AM Introduction . . . . . . . . . . . . . . . .Bernard Courtois
Workshop Chairperson
Nick Kanopoulos
Program Chairperson
10:15 -
12:15 PM Plenary Session/Keynote Presentations. . . . Nick Kanopoulos
Session Chairperson
12:15 -
2:00 PM Lunch

2:00 -
3:30 PM Session 1 - "Rapid System Prototyping
Applications I . . . . . . . . . . . . . . . Ahmed Jerraya
Session Chairperson

P.1.1 "Rapid Prototyping of a Real-Time Video Encoder" - M. Engels, T.
Meng, Stanford University, Stanford, California, USA.

P.1.2 "Using an FPGA Based Computer as a Hardware Emulator for
Built-In Self-Test Structures" - R.W. Wieler, Z. Zhang, R.D.
McLeod, University of Manitoba, Winnipeg, Manitoba, Canada.

P.1.3 "A Reconfigurable DSP Board Based on Cordic Elements" - E.P.
Mariatos, M.K. Birbas, A.N. Birbas, University of Patras, Patras,
Greece.

3:30 -
4:00 PM Coffee Break

4:00 -
5:00 PM Session 2 - "Rapid System Prototyping
Applications II" . . . . . . . . . . . . . . . . Peter Henderson
Session Chairperson

P.2.1 "Rapid Prototype of an SIMD Processor Array (using FPGA's)" -
D.L. Andrews, A. Wheeler, University of Arkansas, Fayetteville,
Arkansas, USA; B. Wealand, Lockheed Corporation,
Sunnyvale, California, USA.

P.2.2 "A real-time Test-bed for Prototyping Cell-based Communication
Networks" - C. Papadopoulos, A. Maniatopoulos, T.
Antonakopoulos, V. Makios, University of Patras, Patras, Greece.

Dinner

8:30 -
10:30 AM Session 3 - "Rapid Software Prototyping:
Methods, Issues, Techniques" . . . . . . . . . .Apostolos Dollas
Session Chairperson

P.3.1 "ProTR: A TOOL FOR REAL-TIME SYSTEMS DEVELOPMENT" -
G.D.F. Azevedo, FCTI; H. Azevedo, STC Telecomunicacos; M.
Jino, UNICAMP, Campinas, Spain.

P.3.2 "An Integrated Framework for Rapid System Prototyping and
Automatic Code Distribution" - W. El Kaim, F. Kordon, MASI
Laboratory, Paris, Cedex, France.

P.3.3 "Experience with RAPID Prototypes" - D. Dolev, Hebrew
University, Jerusalem, Israel; R. Strong, E. Wimmers, Almaden
Research Center, San Jose, California, USA.

P.3.4 "An Approach for Hardware-Software Codesign" - T.B. Ismail, M.
Abid, K. O'Brien, A.A. Jerraya, Laboratory TIMA/INPG, Grenoble, Cedex,
France.

10:30 -
11:00 AM Coffee Break

11:00 -
12:30 PM Session 4 - "Rapid System Prototyping of
Signal Processing Systems. . . . . . . . . . . . . .Stan Winkler
Session Chairperson

P.4.1 "Rapid Development of Signal Processors and the RASSP Program"
- C. Myers, P. Fiore, Lockheed Sanders, Inc., Nashua, New
Hampshire, USA; J.P. Letellier, Naval Research Laboratory,
Washington, DC, USA.

P.4.2 "Geometric Parallelism and Cyclo-Static Data Flow in GRAPE-II" -
R. Lauwereins, P. Wauters, M. Ade, J.A. Peperstraete,
Katholieke Universiteit Leuven, Heverlee, Belgium.

P.4.3 "Buffer Memory Requirements in DSP Applications" - M. Ade, R.
Lauwereins, J.A. Peperstraete, Katholieke Universiteit Leuven,
Heverlee, Belgium.

12:30 -
2:00 PM Lunch

2:00 -
3:30 PM Session 5 - "Prototyping Through Emulation". . . Paul Hulina
Session Chairperson

P.5.1 "Hardware Emulation Board based on FPGAs and Programmable
Interconnections" - O.C.S. Choy, W.Y. Lo, C.F. Chan, The
Chinese University of Hong Kong, Shatin, N.T., Hong Kong.

P.5.2 "Some design issues in Multi-chip FPGA Implementation of DSP
Algorithms" - A. Saha, R. Krishnamurthy, Mississippi State
University, Mississippi State, Mississippi, USA.

P.5.3 "Project Spinnaker: A New Generation of Rapid Prototyping
System" - M. Courtoy, Quickturn Systems, Mountain View,
California, USA.

3:30 -
4:00 PM Coffee Break

4:00 -
5:30 PM Session 6 - "Tools for Rapid Hardware
Prototyping" . . . . . . . . . . . . . . . . . . Manfred Glesner
Session Chairperson

P.6.1 "Extended VHDL for the Rapid System Prototyping of Systems
With Synthesizable and Nonsynthesizable Subsystems" - J.D.S.
Babcock, A. Dollas, Duke University, Durham, North Carolina,
USA.

P.6.2 "From Behavioral to RTL Models: An Approach" - R. McConnell, D.
Lavenier, Institut de Recherche en Informatique et Systems
Aleatoires, Rennes, France.

P.6.3 "Quantitative Design of a Scalable MicroSystem Using ALMA: The
Example of the Dictionary Machine" - J.Y. Brunel, I. Auge, M.
Hervieu, Laboratoires d'Electronique Philips, Limeil-Brevannes,
Limeil-Brevannes, France.

Dinner
Round Table Discussions

8:30 -
10:30 AM Session 7 - "Software Prototyping and
Validation". . . . . . . . . . . . . . . . . Theo Antonakopoulos
Session Chairperson

P.7.1 "Safe Rapid Prototyping of Object-Oriented Database Applications"
- M. Missikoff, M. Toiati, IASI-CNR, Rome, Italy.

P.7.2 "Dynamic Analysis and Replanning Tool (DART): a Case Study of
Accelerated Evolutionary Development" - S.E. Cross, ARPA,
Arlington, Virginia, USA; R. Estrada, BBN Systems and
Technology Corp., Cambridge, Massachusetts, USA.

P.7.3 "A Formal Approach Based on the Rewriting Logic for Prototyping
Distributed Information Systems" - A. Attoui, M. Schneider,
Laboratoire d'Informatique, Aubiere, Cedex, France.

10:30 -
11:00 AM Coffee Break

11:00 -
12:30 PM Session 8 - "Prototyping Tools and
Methodologies" . . . . . . . . . . . . . . . . . Rudy Lauwereins
Session Chairperson

P.8.1 "Algorithms and Architectures to Computational Systems
Implementation" - L. Carro, A. Suzim, Universidade Federal do
Rio Grande do Sul, Porto Alegre, Brazil.

P.8.2 "Accelerating the design process by using architectural synthesis" -
P. Kission, H. Ding, A.A. Jerraya, Laboratory TIMA/INPG,
Grenoble, France.

Lunch