Thanks,
Mike
You can use the PSUB2 layer to define separate regions of the substrate for
LVS purposes. Since the substate is effectively one continuous layer, the
LVS tool looks at any node connected to this region (typically an NMOS
bulk/body tie) as being connected to any other nodes connected to it. So, If
you have two circuits in the same design with separate ground connections,
and the nmos FETs in those circuits have their bulk nodes tied to that local
ground, your LVS tool will show that the two separate grounds are shorted
together through the common substrate. You can surround each of these
circuits with PSUB2 to tell the LVS tool that these are separate
regions/nodes.
Ethan
"Liang-Kai Wang" <lw...@cae.wisc.edu> wrote in message
news:apstdp$9ua$1...@news.doit.wisc.edu...