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sample and hold block block AC simulations

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AG

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Apr 23, 2012, 8:02:54 AM4/23/12
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Is there any 'sample and hold' block in Cadence libraries, which I can
use in ac-simulations. What I am looking for is a block which outputs
the fourier-transform of the signal when the signal goes through that
sample and hold circuit with clock frequency as the input parameter to
the S&H block.

Andrew Beckett

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May 4, 2012, 9:18:56 PM5/4/12
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I think we've discussed this elsewhere, but you could use something like
the Verilog-A model of a sample hold described in
http://www.designers-guide.org/Analysis/hidden-state.pdf
and then simulate with PSS/PAC

Regards,

Andrew.

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