how to generate schematic from netlist?

Samiran

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Feb 17, 2010, 11:44:58 PM2/17/10

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Hi all,

How I can generate schematic from a given netlist in Virtuoso?

Cheers
Samiran

Samiran

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Feb 18, 2010, 5:06:27 AM2/18/10

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can anybody help please!!!!!!

cheers
Samiran

rick

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Feb 18, 2010, 10:17:49 AM2/18/10

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What type of netlist do you have? For CDL, you will use File--
>import-->CDL for verilog, you need to
bring up the verilogXL tool from the "Tools" menu

Rick

Samiran

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Feb 18, 2010, 11:48:39 AM2/18/10

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Hi,

I am actually not aware of different types of netlist (e.g. as you are
telling CDL); But briefly my problem is -

I have a circuit consists of active-devices. After parsing the netlist
(netlist1) of that circuit, I am generating a netlist (netlist2) which
corresponds to the small-signal equivalent circuit of the actual
active-device based circuit. So netlist2 consists only resistances,
capacitances and voltage-controlled-current-sources (vccs). Now I want
to generate the schematic which corresponds to netlist2.

I am not aware how to do this. And again it will be great if you can
direct me how those importing is done.

Thanks,
Samiran

bu-bu

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Feb 18, 2010, 6:08:08 PM2/18/10

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Hello Samiran,

i think you want to read this document:
transrefOA.pdf

Which is located in the doc directory of your local Cadence
installation directory.
<Cadence Inst Dir>/doc/transrefOA

In this document, you will find a chapter: Netlist import using
SpiceIn

I hope this will help you.

best,

bubu

Andrew Beckett

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Feb 19, 2010, 10:06:28 AM2/19/10

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bu-bu wrote, on 02/18/10 23:08:

>> Hi,
>>
>> I am actually not aware of different types of netlist (e.g. as you are
>> telling CDL); But briefly my problem is -
>>
>> I have a circuit consists of active-devices. After parsing the netlist
>> (netlist1) of that circuit, I am generating a netlist (netlist2) which
>> corresponds to the small-signal equivalent circuit of the actual
>> active-device based circuit. So netlist2 consists only resistances,
>> capacitances and voltage-controlled-current-sources (vccs). Now I want
>> to generate the schematic which corresponds to netlist2.
>>
>> I am not aware how to do this. And again it will be great if you can
>> direct me how those importing is done.
>>
>> Thanks,
>> Samiran
>

In IC61X, you have File->Import->SPICE - this is more generic than the
File->Import->CDL which was available in IC5141.

Regards,

Andrew.

Samiran

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Feb 22, 2010, 5:25:02 AM2/22/10

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On Feb 19, 8:06 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm>
wrote:

I have tried importing the netlist through File > Import > CDL...
option. But I got an error. the error msg written in ni.log file is:

############################################
ERROR (CDLIN-32): The option refLibList is not specified in the
options file /tmp/cdlInParf03455. This option is
needed to specify the list of reference libraries for master cells.

Usage error.

I provided "CDL Netlist File" & "Output Library Name" as input and
didn't enter anything for "Parameter File", "Top Cell", "Reference
Library List" or "Device-map File". Is this causing the problem? Also
please let me know what exactly is referred to by "Reference Library
List"?

Andrew Beckett

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Feb 23, 2010, 3:49:40 AM2/23/10

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Samiran wrote, on 02/22/10 10:25:

Almost certainly you'll need to provide a library containing the transistor,
resistor, capacitor etc symbols, and a device map file to tell it how to map
devices in the CDL netlist to components in the library.

Please read the documentation - it's in the
<ICinstDir>/doc/transref/transref.pdf document.

Regards,

Andrew.

Monika Monika

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Aug 4, 2022, 6:53:25 AM8/4/22

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can you please elaborate the address of transref.pdf file in cadence virtuoso 6.1.7

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