does anyone remember the old National Semiconductor microprocessor
called SC/MP (aka INS8060)?
This was in the heart of my first computer 20 years ago.
Is any of the architecture information for this processor available
Thank you for any help,
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>does anyone remember the old National Semiconductor microprocessor
>called SC/MP (aka INS8060)?
This was used in Clive Sinclair's MK14, the first computer I owned, as you
said about twenty years ago. If I remember correctly the architecture was
fairly clean and elegant however doing timing loops was a nightmare. Although
the SC/MP had a hardware delay instruction for cheapness the MK14 used a PAL
subcarrier crystal (4.43361925 MHz) as the frequency reference.
>Is any of the architecture information for this processor available
Have a look at the CPU Info Center
The SC/MP (and a lot of other interesting CPUs) are mentioned in the 'History
of CPUs section.
It's described briefly in the Great Microprocessors page,
available from various sites such as mine, or the CPU Info Centre at:
It also has a couple links which might be helpful, but then might not
Great Microprocessors of the Past and Present (V 9.9.4)
Section Two: Forgotten/Innovative Designs before the Great Dark Cloud
Part III: SC/MP, early advanced multiprocessing (April 1976) . . . .
The National Semiconductor SC/MP (Single Chip/Micro Processor,
nicknamed "Scamp") was a typical 8 bit processor intended for control
applications (a simple BASIC 2.5K ROM was added to one version). It
featured 16 bit addressing, with 12 address lines and 4 lines borrowed
from the data bus (it was common to borrow lines (sometimes all of
them) from the data bus for addressing - however only the lower 12
index register/PC bits were incremented (4K pages), special
instructions modified upper 4 bits). Internally, it included four
index registers (P1 to P3, plus the PC/P0) and two 8 bit registers. It
had no stack pointer or subroutine instructions (though they could be
emulated with index registers). During interrupts, the PC and P3 were
swapped. It was meant for embedded control, and many features were
omitted for cost reasons. It was also bit serial internally to keep it
The unique feature was the ability to completely share a system bus
with other processors. Most processors of the time assumed they were
the only ones accessing memory or I/O devices. Multiple SC/MPs (as
well as other intelligent devices, such as DMA controllers) could be
hooked up to the bus. A control line (ENOUT (Enable Out) to ENIN)
could be chained along the processors to allow cooperative processing.
This was very advanced for the time, compared to other CPUs.
In addition to I/O ports like the 8080, the SC/MP also had
instructions and one pin for serial input and one for output.
National Semiconductor eventually replaced the SCMP with the COP4 (4
bit) and COP8 (8 bit) embedded controllers, with only two index
registers, but adding stack support.
National Semiconductor Microcontroller Technology:
John Bayko (Tau).
> does anyone remember the old National Semiconductor microprocessor
> called SC/MP (aka INS8060)?
From memory, the SC/MP was not the 8060.
One was PMOS and the other NMOS.
Other than that they shared the same architecture
and pinout (other than supplies, of which there
were more than one for the PMOS version).
How about the 8070, the successor to the 8060 ?
I have one somewhere in my parents' garage in
a system I built a long time ago.
Enough nostalgia for now...
Can anybody confirm this? I was told by a NatSemi designer
who should have known that the reason the Scamp was so slow was that
the microcode was essentially "conditionally executed" (Think of an
ARM with no, or few, branches), rather than that the ALU was bit-serial.
I'd have thought they would have learned a lesson from the PDP-8S,
but what am I thinking, CS _cultivates_ Technological Alzheimers... :-)
(as boo has shown in another thread :-)
: The unique feature was the ability to completely share a system bus
: with other processors. [...]
: could be chained along the processors to allow cooperative processing.
: This was very advanced for the time, compared to other CPUs.
Yeah, if your task was easily partioned, you could chain together
enough Scamps to _almost_ match a single, same price, 6502 :-)
| alb...@agames.com, speaking only for myself
SC/MP was PMOS.
SC/MP II was NMOS and also designated INS8060.
> How about the 8070, the successor to the 8060 ?
> I have one somewhere in my parents' garage in
> a system I built a long time ago.
> Enough nostalgia for now...
My distant and clouded memory recalls that the 8070 was
the 8060 SC/MP II with a 4K ROM on chip with the NIBL
Tiny BASIC interpreter.
The bus sharing facility always looked cute and simple but I never
heard of anybody ever using it.
More significantly the SC/MP took so many cycles to do anything
with instructions being primarily register operations and taking
5 or 7 cycles even for simple things - with memory accesses taking
2 cycles that there was a lot of spare bus bandwidth to share with
a second and possibly even a third processor.
: The bus sharing facility always looked cute and simple but I never
: heard of anybody ever using it.
I did. One fellow made an organ out of twelve Scamps. Each
handled the synthesis of a single note, across several octaves.
a) He worked for NatSemi, and got the parts for free.
b) It was a "one-off", so parts cost was nearly irrelevant.
c) It was an elaborate joke.
I also especially like the (internally circulated, but
seriously frowned upon) Application Note suggesting that the Scamp
would make a darn fine fishing-lure :-)