SIGMETRICS 93 announcement
owi...@src.dec.com
Title: 1993 ACM SIGMETRICS Conference on Measurement and Modeling
of Computer Systems
Date: May 10 - 14, 1993
Place: Santa Clara Marriot, Santa Clara, California
------------------------------------------------------------
OVERVIEW
The 1993 Annual Conference on Measurement and Modeling of Computer Systems
will be held May 10 - 14, 1993, in Santa Clara, California. It will feature
- Tutorials (May 10, 11)
- Technical Conference with:
Keynote Spearkers
Presentations of papers
Poster and work-in-progress sessions.
This on-line announcement contains the following sections:
- TUTORIAL SCHEDULE
- CONFERENCE PROGRAM
- TUTORIAL ABSTRACTS
- PEOPLE
- LOCATION
- CONFERENCE AND TUTORIAL PRE-REGISTRATION
- HOTEL RESERVATION
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TUTORIAL SCHEDULE (see below for abstracts)
Extended Tutorials (May 10, 1993)
Both Extended Tutorials are presented concurrently from 1:00 - 5:00
Jim Gray - A Tour of Popular DB and TP Benchmarks
Fouad Tobagi - B-ISDN: SONET, ATM, and Fast Packet Switching
Regular Tutorials (May 11, 1993)
Within each track, the times for the 1st, 2nd, 3rd, and 4th tutorials are:
8.30-10:00, 10:30-12:00, 1:30-3:00, and 3:30-5:00.
Systems Architecture
Alan Smith - Cache Memories.
David Kaeli - Issues in Trace-Driven Simulation.
Garth Gibson - Performance and Reliability in Disk Arrays.
P. Venkat Rangan - Architectures and Algorithms for Digital
Multimedia On-Demand Servers.
Performance Methodology
Kang Shin - Evaluation of Real-Time Fault-Tolerant Computing Systems.
Daniel Reed - Performance Environments for Scalable Parallel Systems.
C. M. Woodside - Performance Engineering of Client-Server Software Systems.
Philip Yu - Modeling and Analysis of Transaction Processing Systems.
Abstract Models
Richard Muntz - The Stochastic Complement, Decomposition and Aggregation in
the Numerical Solution of Markov Models.
Guy Latouche - Divide-and-Conquer Methods for Quasi-Birth-Death Processes.
Benjamin Melamed - TES Modeling of Autocorrelated Time Series with
Applications to Source Modeling of Compressed Video.
Joe Hellerstein - Modeling Dynamic Behavior with Time Series Analysis.
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CONFERENCE PROGRAM
************
Monday, May 10
***********
12:30 - 1:30 Registration
1:30 - 5:00 Extended Tutorials
***********
Tuesday, May 11
**********
7:30 - 8:30 Registration
8:30 - 5:00 Tutorials
7:00 - 9:00 Reception and registration
************
Wednesday, May 12
************
8:45 - 9:00 Opening Remarks
9:00 - 10:00 Keynote Speaker
"Software Technologies
for Massively Parallel Processing"
Lennart Johnsson
Thinking Machines Corp. and Harvard University
10:00 - 10:30 Break
10:30 - 11:30 I/O System Performance I
Chair: Garth Gibson, CMU
A New Approach to I/O Performance Evaluation -
Self-Scaling I/O Benchmarks, Predicted I/O
Performance
Peter M. Chen and David Patterson
University of California at Berkeley
Trace Driven Analysis of Write Caching Policies
for Disks
Prabuddha Biswas and K.K. Ramakrishnan, DEC
and Don Towsley, University of Massachusetts at
Amherst
11:30 - 12:30 Cache Simulation
Chair: Anoop Gupta, Stanford University
Efficient Simulation of Caches under Optimal
Replacement with Applications to
Miss Characterization
Rabin A.Sugumar and Santosh G. Abraham
University of Michigan at Ann Arbor
Cache Inclusion and Processor Sampling in
Multiprocessor Simulations
Jacqueline Chame and Michel Dubois
University of Southern California
12:30 - 1:30 Lunch
1:30 - 2:30 Posters
2:30 - 4:00 Parallel Systems I
Chair: John Zahorjan, University of Washington
The Wisconsin Wind Tunnel:
Virtual Prototyping of Parallel Computers
Steven K. Reinhardt, Mark D. Hill, James R. Larus,
Alvin R. Lebeck, James C. Lewis and David A. Wood
University of Wisconsin at Madison
The Influence of Random Delays on Parallel
Execution Times
Vikram Adve and Mary K. Vernon
University of Wisconsin at Madison
The KSR1: Experimentation and Modeling of Poststore
E. Rosti, E. Smirni, T.D. Wagner, A.W. Apon and
L.W. Dowdy
Vanderbilt University
4:00 - 4:30 Break
4:30 - 5:30 Work in Progress
8:30 Town Meeting
************
Thursday, May 13
************
8:30 - 9:30 I/O Systems II
Chair: Don Towsley, University of Massachusetts at
Amherst
The Process-Flow Model: Examining I/O Performance
from the System's Point of View
Gregory R. Ganger and Yale R. Patt
University of Michigan at Ann Arbor
An Analytic Performance Model of Disk Arrays
Edward K. Lee and Randy H. Katz
University of California at Berkeley
9:30 - 10:30 Keynote Address:
"Terabytes >> Teraflops
(Or why work on processors when I/O is where the
action is?)"
David Patterson
University of California at Berkeley
10:30 - 11:00 Break
11:00 - 12:00 Tools and Techniques
Chair: Peter Danzig, USC
MEASURE+ - A Measurement-Based Dependability
Analysis Package
Dong Tang and Ravishankar K. Iyer
University of Illinois at Urbana-Champaign
On the Sensitivity of Transient Solutions of
Markov Models
A.V. Ramesh and Kishor Trivedi
Duke University
12:00 - 1:00 Lunch
1:00 - 2:00 Posters
2:00 - 3:00 Simulation Methods
Chair: Ben Melamed, NEC USA
Parallel Simulation of Markovian Queueing Networks
Using Adaptive Uniformization
David Nicol, College of William and Mary
Philip Heidelberger, IBM
The Accuracy of Trace-Driven Simulations
of Multiprocessors
Stephen R. Goldschmidt and John L. Hennessy
Stanford University
3:00 - 3:30 Break
3:30 - 5:00 Parallel Systems II
Chair: Larry Dowdy
Vanderbilt University
Processor Scheduling on Multiprogrammed, Distributed
Memory Parallel Computers
Sanjeev K. Setia, University of Maryland
Mark S. Squillante, IBM
Satish K. Tripathi, University of Maryland
Performance Comparison of Thrashing Control Policies
for Concurrent Mergesorts with Parallel
Prefetching
Kun-Lung Wu, Philip Yu and James Teng, IBM
A Markov-Modulated Bernoulli Process Approximation
for the Analysis of Banyon Networks
Dikran S. Meliksetian, South Dakota School of Mines
and Technology
C.Y. Roger Chen, Syracuse University
Evening Banquet, Decathlon Club
************
Friday, May 14
************
8:30 - 10:00 Real-Time Scheduling
Chair: Ian Akyildiz, Georgia Tech
Modeling and Validation of the Real-Time
Mach Scheduler
Hiroshi Arakawa, Daniel I. Katcher, Jay K. Strosnider
and Hideyuki Tokuda, CMU
ROBUST: A Hardware Solution
to Real-Time Overload
Sanjoy Baruah, University of Texas at Austin
Jayant R. Haritsa, University of Maryland
Efficient On-line Processor Scheduling for a
Class of IRIS (Increasing Reward with
Increasing Service) Real-Time Tasks
Jayanta K. Dey, James F. Kurose, Don Towsley,
C.M. Krishna and Mahesh Girkar,
University of Massachusetts at Amherst
10:00 - 10:30 Break
10:30 - 12:00 Cache Models
Chair: Derek Eager, University of Saskatchewan
Analysis of Superposition of Streams into
a Cache Buffer
R.J.T. Morris, IBM
Analyzing Multiprocessor Cache Behavior Through Data
Reference Modeling
Jory Tsai, DEC
Anant Agarwal, MIT
Effectiveness of Trace Sampling for Performance
Debugging Tools
Margaret Martonosi and Anoop Gupta, Stanford
Thomas Anderson, University of California at Berkeley
12:00 - 12:15 Closing Remarks
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TUTORIAL ABSTRACTS
Monday, May 10, 1:00 - 5:00
A Tour of Popular DB and TP Benchmarks
Jim Gray
Digital Equipment Corporation
455 Market St. 7th Floor
San Francisco, CA 94105
Abstract
This class will tour the design, rational, and experience with
the popular (and some not so popular) benchmarks
used in the database (DB) and transaction processing (TP)
communities. Premier among these are the Transaction Processing
Performance Council benchmarks (TPC-A and B) and the newly approved
TPC-C (the order entry benchmark). These benchmarks measure OLTP
performance. The benchmarks and their model of throughput
(performance) and price performance will be explained.
Experience with the benchmarks explains the rationale for the newer
ones. The second lecture discusses benchmarks covering
decision support (Wisconsin, Set-Query, TPC-D), OO databases (OO1
and OO7), text retrieval (Full Text Retrieval), and scientific databases
(Sequoia). Implicit in the course will be the concepts and techniques
to go into benchmark design: simplicity, portability, scaleability,
and relevance. Much of the class is based on the new edition of
"The Performance Handbook for Database and Transaction Processing Systems".
.............................................................
Monday, May 10, 1:00 - 5:00
B-ISDN: SONET, ATM, and Fast Packet Switching
Fouad A. Tobagi
Department of Electrical Engineering
Stanford University
Stanford, California 94305
and
Starlight Networks
Mountain View, California 94041
Abstract
Two characteristics mark the design of future telecommunications
networks: (i) the ability to support high bandwidth applications (such
as digitized video and image communication), and (ii) the ability to
integrate all services on the same network. In response to these
needs, the switching technique found to be the most appropriate is a
form of packet switching, commonly referred to as Asynchronous
Transfer Mode (ATM).
In this tutorial, we begin with a brief overview of the projected
applications and their bandwidth requirements. We then describe SONET,
the physical layer underlying ATM networks, and the ATM standard protocols
as defined by CCITT and the ATM Forum. Finally, we address the issue
of fast packet switching and survey the various architectures used in
building switches for ATM networks.
The course outline includes,
1. Broadband Applications and Bandwidth Requirements,
2. Fiber Optics
Transmission Facilities: SONET, Frame Formats, Data Rates,
3. ATM Standards: Architecture and Protocols.
and 4. Fast Packet Switch Architectures, Performance and Implementation.
............................................................
Tuesday, May 11, 8:30 - 10:00
Cache Memories
Alan J. Smith
CS Division, 571 Evans Hall
UC Berkeley
Berkeley, CA 94720
Abstract
Cache memories are used in almost all high performance computer systems
in order to effectively reduce the main memory access time.
This talk will survey the design of and design considerations for cache
memories. Specific topics discussed will include: cache fetch algorithms
(demand vs. prefetch), placement (set associative, direct mapping, etc.) and
replacement (LRU, FIFO, etc.) algorithms, line size, store through vs.
copy back updating of main memory, cold start vs. warm start miss ratios,
multicache consistency, the effect of input/output through the cache,
virtual address caches, user/supervisor caches, multilevel cache,
the behavior of split instruction/data caches, cache size, translation
lookaside buffers, etc.
......................................................
Tuesday, May 11, 10:30 - 12:00
Issues in Trace-Driven Simulation
David Kaeli
IBM T. J. Watson Research Center
Yorktown Heights, NY 10598
Abstract
Considerable effort has been devoted to the development of accurate trace-driven
simulation models of today's computer systems. Unfortunately many
modelers do not carefully inspect the input to their models.
The fact is that the output of any model is only as good as the input
to that model. This tutorial covers the many aspects of the input
traces used in trace-driven simulation. A review of the many trace types,
trace-driven model types, tracing methodologies, and trace-length reduction
techniques is presented.
A key issue addressed in this tutorial will show how traces are frequently
misused in a simulation. The goal is to equip the modeler with enough
background so that he or she can be more critical of the content of
traces used to drive their simulation models.
................................................................
Tuesday, May 11, 1:30 - 3:00
Performance and Reliability in Disk Arrays
Garth Gibson
Computer Science Department
Carnegie Mellon
5000 Forbes Ave
Pittsburgh, PA 15213
Abstract
Recent advances in processor and memory technology have
given rise to increases in computational performance that far outstrip
increases in the performance of secondary storage technology.
Coupled with emerging small-disk technology,
disk arrays provide the cost, volume, and capacity of
traditional disk subsystems but, by leveraging parallelism,
many times their performance. This tutorial will describe
the effect of various configurations of data striping on I/O performance.
Unfortunately, arrays of small disks may have much higher
failure rates than the single large disks they replace.
Redundant Arrays of Inexpensive Disks (RAID) use simple redundancy schemes
to provide high data reliability.
This tutorial will describe models for the performance costs and
reliability enhancements of various configurations of redundant disk
arrays.
..............................................................
Tuesday, May 11, 3:30 - 5:00
Architectures and Algorithms for Digital Multimedia On-Demand Servers
P. Venkat Rangan
Multimedia Laboratory
Computer Science and Engineering Department
University of California at San Diego
La Jolla, CA 92093
Abstract
Recent advances in digital audio and video processing technologies
coupled with the availability of high bandwidth networks and large
capacity storage devices is making it feasible to build multimedia
on-demand servers over metropolitan-area networks. In this tutorial,
we will develop architectures and algorithms for designing a
high-performance, multimedia on-demand server capable of servicing a
large number of clients simultaneously. We will address questions such
as: (1) How should digital continuous media be stored on disks so
as to ensure their continuous and synchronous retrieval? (2) What policies
should a multimedia server employ to service multiple clients simultaneously
without violating the continuity or synchrony requirements of any of the
clients? We will evaluate the current state of art in these areas,
and outline promising areas for future research.
............................................................
Tuesday, May 11, 8:30 - 10:00
Evaluation of Real-Time Fault-Tolerant Computing Systems
Kang Shin
University of Michigan
Department of Electrical Engineering and Computer Science
Abstract
Real-time computing systems that commonly support such critical
applications as computer-integrated manufacturing, drive-by-wire,
and process control must not only be logically correct, but also
meet the stringent timing constraints imposed by the applications.
This course will cover the state-of-art means to accomplish this
goal and discuss how to characterize and evaluate real-time
fault-tolerant systems. It will focus on the basic concepts of
real-time fault-tolerant systems, real-time performance evaluation,
task and message scheduling. If time allows, we will also touch on
real-time architectures and communications, operating systems and
software tools, and fault tolerance.
This course is intended for engineers and scientists who desire a
quick introduction to the state-of-art techniques for distributed
real-time systems.
ing and analyzing performance data
on massively parallel systems, including potential perturbations,
large data volumes, and correlation of data with source code.
Based on this background, we describe
a software toolkit approach whose design is based on the
lessons learned from two previous generations of performance data
analysis software. The toolkit contains a set of performance data
transformation modules that can be interconnected in user-specified ways
to form an acyclic, directed data analysis graph. Performance trace data
are represented in a self-documenting stream format that includes
internal definitions of data types, sizes, and names.
.................................................................
Tuesday, May 11, 1:30 - 3:00
Performance Engineering of Client-Server Software Systems
C.M. Woodside
Department of Systems and Computer Engineering
Carleton University, Ottawa, Canada
Abstract
A great many distributed applications have a client-server
architecture, and many more are being planned, including transaction
processing systems, network services, and computational services.
Almost all systems based on remote procedure calls (RPC) have a
client-server structure and distributed processing architecture such
as DCE (Distributed Computing Environment) from the open System
Foundation do too.
The performance of these systems has an unsettling
characteristic because of the blocking nature of almost all RPC, that
the service times of the software server tasks are not constant, but
increase with load. This makes it more necessary than normal to model
the performance of the system, using a model that incorporates this
effect. Further, this effect also can modify the location of
bottlenecks, and create "software bottlenecks" which are difficult to
diagnose in advance.
The tutorial will describe a special category of models for these systems called
"Rendezvous Networks", their application to modelling
large-scale client-server systems and will
highlight issues involving the propagation of bottlenecks, the diagnosis and
correction of bottlenecks
and the performance effects of the partitioning of functionality
between servers in complex systems.
An analytic modelling framework for these systems will be used
to give insight into their behaviour.
This is an applied tutorial directed mainly towards people who
want to build models of real systems. The methods are intended to be
usable by system designers who are not performance professionals.
Some recent research results will be included, and some research
issues will be raised.
................................................
Tuesday, May 11, 3:30 - 5:00
Modelling and Analysis of Transaction Processing Systems
Philip Yu
IBM T. J. Watson Research Center
Yorktown Heights, NY 10598
Abstract
The objective is to provide an analytic framework for analyzing
the various design issues in transaction processing systems.
The transaction response time depends on the level of data
contention and hardware resource contention. A hierarchical modelling
approach is presented which decomposes the problem into submodels
and captures the interactions between the submodels through a fixed
point iteration. Various approaches to concurrency control (CC)
are examined. A general analytic modelling methodology
is presented so that different CC schemes can be analyzed under a
unified framework to better understand their performance trade-offs.
The analysis captures the effect of skewed data accesses, different
lock modes, and variable length transactions. We first consider a
centralized system and then generalize the methodology to analyze
distributed systems and coupled systems. The effect of data replication
under different distributed CC schemes is analyzed. The implications
of buffer coherency control policies are examined in a multi-node
environment.
....................................................................
Tuesday, May 11, 8:30 - 10:00
The Stochastic Complement, Decomposition and Aggregation
in the Numerical Solution of Markov Models
Richard Muntz
Department of Computer Science
University of California at Los Angeles
Los Angeles, Ca 90024
Abstract
Numerical solutions of Markov models are useful when
a closed form solution is not available.
Notwithstanding the advances in high performance computing, the
ability to compute numerical solutions is limited by the size
of the state space. To solve models of realistic complexity
is often impossible unless there is special structure that
can be exploited. This tutorial will examine
several classes of special structure that, when applicable, can
lead to efficient numerical solution methods. We will consider
the use of aggregation, decomposition and the concept
of the stochastic complement in direct solution methods, exact
iterative solution methods and in the computation of
bounds on the solution of Markov models.
To illustrate the use of these methods we will present
applications which include models of reliability, load balancing,
queueing networks, and ATM switches.
................................................................
Tuesday, May 11, 10:30 - 12:00
Divide-and-Conquer Methods for Quasi-Birth-and-Death Processes
Guy Latouche
Universite Libre de Bruxelles
Departement d'Informatique
Campus Plaine --- CP 212
Boulevard du Triomphe
1050 Bruxelles Belgium
Abstract
The M/M/1 queue is a Markovian process with homogeneous
transitions: the arrival and service rate do not depend on the
state of the queue. Many models in computer performance evaluation
appear as homogeneous Quasi-Birth-and-Death processes, where the
state space is divided into subvectors called levels, and the
transition rates do not depend on the level.
This homogeneity property allows one to use divide-and-conquer
methods to determine various quantities of interest: the
stationary distribution, expected time to blocking (in the finite
buffer case), the distribution of the maximum queue length
during a busy period, etc.
In this tutorial, we shall give a simple presentation of the
methods and discuss a few examples.
......................................................
Tuesday, May 11, 1:30 - 3:00
TES Modeling of Autocorrelated Time Series
With Applications to Source Modeling of Compressed Video
Benjamin Melamed
NEC USA, Inc.
Princeton, NJ 08540
Abstract
This tutorial overviews a new class of diverse models, called TES
(Transform-Expand-Sample), for generating autocorrelated random
sequences. The novel feature of TES is its ability to simultaneously
capture both the empirical marginal distribution (histogram)
and the empirical autocorrelation function (a measure of linear
dependence), calculated from empirical data sets (field measurements).
A visual interactive software package, called TEStool, designed to support
TES modeling, will also be described and its use will be demonstrated.
The efficacy of TES will be exhibited through case studies of source
modeling for compressed (VBR) video, including DCT and MPEG.
.....................................................
Tuesday, May 11, 3:30 - 5:00
Modeling Dynamic Behavior With Time Series Analysis
Joe Hellerstein
IBM T. J. Watson Research Center
Yorktown Heights, NY 10598
Abstract
The need to model dynamic behavior in computer systems arises
in many contexts, such as characterizing the locality of file access
patterns to evaluate the effectiveness of disk caching, evaluating the
convergence properties of control algorithms, and identifying
performance problems by their time serial behavior. This tutorial
describes time series analysis (a statistical technique), and
applies it to the performance analysis of computer systems, especially
to queueing models. The autoregressive integrated moving average
(ARIMA) model is discussed in detail, including the use of
autocorrelation functions for model identification.
The tutorial concludes with a case study that examines measurements
taken from a mainframe computer system.
----------------------------------------------------
PEOPLE
General Chair: Susan Owicki, Digital Equipment Corp.
Program Chair: Dick Muntz, UCLA
Conference Committee:
David Finkel, Worchester Tech - Book Display
Annop Gupta, Stanford University - Local Arrangements
Rejeev Jog, Kubota Pacific - Proceedings Editor
Seetha Lakshmi, IBM - Treasurer
Michael Melliar_Smith, UCSB - Registration
Louise Moser, UCSB - Poster Sessions
Randolph Nelson, IBM - Tutorials
Herb Schwetman, MCC - Publicity
Program Committee:
Ian F. Akyildiz, Georgia Tech
Peter Danzig, USC
Larry Dowdy, Vanderbilt
Derek Eager, Univ. of Saskatchewan
Garth Gibson, CMU
Albert Greenberg, AT&T Bell Labs
Anoop Gupta, Stanford
Raj Jain, DEC
Benjamin Melamed, NEC USA
Robert J.T. Morris, IBM
Dave Nicol, William and Mary
Dan Reed, Univ. of Illinois
Scott Shenker, Xerox
Edmundo de Souza e Silva, UFRJ Brazil
Guri Sohi, Univ. of Wisconsin
Billy Stewart, NCSU
Don Towsley, Univ. of Massachusetts
Johnny Wong, Univ. of Waterloo
Philip S. Yu, IBM
John Zahorjan, Univ. of Washington
Songnian Zhou, Univ. of Toronta
Invited Speakers:
Lennart Johnsson, Thinking Machines Corp. and Harvard University
David Patterson, University of California at Berkeley
---------------------------------------------------
LOCATION
Santa Clara and the San Francisco Bay Area
Santa Clara is located in the heart of Silicon Valley, just 45 minutes
South of San Francisco and 10 minutes North of San Jose. The
conference site is adjacent to Great America Theme Park (open on week
ends in May) and near wineries, Spanish missions, and the Santa Cruz
beach and boardwalk.
You can extend your stay in California with a weekend in San Francisco,
Or tour the wine country North of San Francisco, or enjoy the charm
and natural beauty of the Monterey Bay to the South. All are within
easy driving distance of the conference site.
Climate
The weather in Santa Clara in May is typically sunny and mild. Days
are sometimes hot, and a light jacket may be neeeded in the early
morning and evening.
Conference Site
All technical sessions, lunches, and registration will be held at
the Santa Clara Marriott. The hotel has free parking, indoor/outdoor
pool, whirlpool, exercise room, game room, and four lighted tennis
courts. Golf is available nearby.
Directions
>From San Jose Airport: Go four miles north on Highway 101 to Great
America Parkway Exit. From San Francisco International Airport:
Go 36 miles south on Highway 101 to Great America Parkway Exit.
The Marriot is at the intersection of Great America Parkway and Mission
College Boulevard, a short distance from Highway 101.
Transportation
Complimentary van transportation to the Marriott is available from
San Jose Airport. Shuttle service from San Francisco International
Airport is offered by the following companies. Advance reservations are
required.
Express Shuttle $21 408 378-6720
BayPorter $17 415 467-1800
Airport Connection $16 4l5 363-1500
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CONFERENCE AND TUTORIAL PRE-REGISTRATION
Please send with check or money order to:
SIGMETRICS '93 Registration
c/o Prof. P. M. Melliar-Smith
Electrical and Computer Engineering
University of California
Santa Barbara, CA 93106
Telephone: 805-893-8438
Fax: 805-893-3262
Email: pm...@ece.ucsb.edu
Attendance options (circle one): Before April 12 After April 12
Tutorials & Conference (May 10-14)
ACM/SIG Member $460 $610
Non-Member $535 $685
Full-time Student $180 $260
Conference Only (May 12-14)
ACM/SIG Member $310 $385
Non-Member $360 $435
Full-time Student $115 $165
Tutorials Only (May 10-11)
ACM/SIG Member $210 $285
Non-Member $235 $310
Full-time Student $ 80 $115
Vegetarian meals requested:____________
Extra Banquet Ticket (May 13) $45__________
Total Amount Enclosed:_____________________________
If you have selected the student rate, please be prepared to show a valid
student ID at the time you attend the conference.
The conference registration fee includes attendance at all technical
sessions, two luncheons, reception and banquet, and a copy of the
proceedings. The tutorial registration fee includes attendance at all
tutorial sessions, tutorial materials, and one luncheon.
In the event that you are unable to attend the meeting after you have paid
fees, you will receive full refund prior to April 28, 75% refund from
April 18 to May 7, and no refunds after May 7.
Name:______________________________________________________
Phone number:______________________________________________
Affiliation:_________________________ Mbr number:__________
Address:___________________________________________________
City:_____________________State:____________Zip:___________
E-mail address:____________________________________________
____You may include my name in the List of Participants which might
be distributed at the Conference.
A FREE Conference T-shirt will be available to those who pre-register
and the pre-registration is received by the due date, April 12.
Please indicate size and color:
_____Medium _____Large _____X-large ____Burgandy _____While
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HOTEL RESERVATION - ACM SIGMETRICS '93, May 9 - 15, 1993
Send to:
Santa Clara Marriot Hotel
2700 Mission College Boulevard
Santa Clara, CA 95054
Tel: 408-988-1500, Fax: 408-727-4353
Deadline for conference room rate: April 17, 1993
$95.00 Single Double Smoking
$105.00 Triple Quadruple Nonsmoking
plus Salse and lodging tax (9.56%)
Arrival Date:____________________ Departure data:________________
Arrival Time:____________________
All reservations will be held until 6:00 pm on arrival night unless
accompanied by a first night room deposit on a major credit card. If
the room is guaranteed and the individual does not arrive, the
individual will be responsible for the first night payment of room
rate plus tax charges.
Card type:__________________, Expiration date:_________________
Card number:____________________
Signature:________________________________
Note: Check in time is after 3:00 pm and check out time is at 11:00 am.
Reservations received after April 17th will be confirmed only if space
is available. Guests who cancel by 6:00 pm on scheduled arrival will not
be charged. Cash, major credit card and checks are acceptable when settling
your bill.
Do you wish confirmation to be sent to you? yes________, no__________
Name:_________________________________________________
Company/Institute:____________________________________
Address:______________________________________________
City & State/Prov:____________________________________
Country:________________ Zip/Postal code:_____________
Telephone:____________________________________________