The question is:
A nonpipelined processor X has a clock rate of 2.5GHz and an average
CPI of 4. Processor Y,
an improved successor of X, is designed with a five-stage linear
pipeline. However, due to latch
delay and clock skew effects, the clock rate of Y is only 2GHZ.
a) If a program containing 10,000 instructions is executed on both
processors, what is the
speedup of processor Y compared to that of processor X?
b) Calculate the MIPS rate of each processor during the execution of
this particular program.
Well this is what i have done:
The CPI = CPU clock Cycles/instruction count.
This is the work I have for processor X:
Cpu clock cycles = instructions * CPI = (10,000)*4 = 40,000 cycles.
Cpu time = CPU clock cycles/clock rate = 40,000/2.5Ghz = 40,000/2.4E9
= .000016 seconds
CPU execution time for a program = cpu clock cycles/clock rate =
40,000/2.5E9 = .000016 seconds
Performance = 1/Execution time = 1/.000016 = 62500.
Okay now for processor Y is where i'm having troubles....
If its a 5 stage pipeline processor, does that mean the Cpu clock
cycle would be 10,000/5 = 2,000 cycles?
I tried this but i'm getting the wrong answer and not sure why...
Here is my work for processor Y:
CPU execution time for a program = CPU clock ccyles/cock rate = 2,000
cycles/2E9 = .000001
Performance = 1/execution = 1/.000001 = 1.E6.
But doesn't this mean that the perfmance of processor Y is slower than
X? that it shouold be faster, then would i just do:
PerformanceX/PerfomranceY = 62500/1.E6 = .0625. So i'm getting X is .
0625 times faster than Y but this is incorrect, any help would be
great!!
:)
If so then I would get the following:
Cpu clock cycles = instructions * CPI = (10,000)*5 = 50,000 cycles.
Cpu time = CPU clock cycles/clock rate = 50,000/2Ghz = 50,000/2E9
= .000025 seconds
Performance = 1/Execution time = 1/.000025 seconds =40,000
Performance y/ Performance x =
40,000/62500 = .64.
SO processor Y(the pipeliend processor) is .64 times faster than
processor x.
Does that sound about right?
No. The *latency* is 5 cycles. CPI is somewhere between 1 and 5 and
depends how many cycles you have where the pipeline isn't doing
something useful in all stages. It's probably substantially closer to
1 than 5. With no details of any stall situations provided in the
question, I guess you have to assume that the processor manages to
keep its pipeline completely full.
Just so that you can tell when you have an approximately right answer,
I suspect the number you're looking for is in the region of 3. Which
is how come pipelined processors are all you can get these days and
the notion of a 2.5GHz unpipelined processor nearly made me spit
coffee on my keyboard.
Cycle time of X = 1/2.5Ghz = 400 ps
Cycle time of y = 1/2Ghz = 500ps
a. To execute 10,000 instructions X needs 4*10,000 = 40,000cycles =
40,000*400ps.
Y needs 5 + (10,000-1) = 10,004 cycles = 10,004*500ps.
Speedup = 160,000/50020 = 3.19
i had a simple question... I have, Cycle time of X = 1/2 Ghz =
500ps.. well i looked up p, and it stands for peco, which is
E-12....Ghz = E9. So i took 1/2E9 =5.E-10. Well if its
500ps...wouldn't I need to move that decimal 2 places to the left? and
get .005E-12? or .005ps..i thought moving it to the right would make
it E-8
> The question is:
> A nonpipelined processor X has a clock rate of 2.5GHz and an average
> CPI of 4.
So instructions/ second = 2.5 x 10^9 / 4
Processor Y,
> an improved successor of X, is designed with a five-stage linear
> pipeline. However, due to latch
> delay and clock skew effects, the clock rate of Y is only 2GHZ.
The simple minded assume ( wrongly of course ) that a 5 stage pipeline
improves cpi five times.
So instructions/ second = ( 2.0 x 10^9 / 4 ) x 5
> b) Calculate the MIPS rate of each processor during the execution of
> this particular program.
Calculate the time to execute the program on each processor.
For processor Y, add the latency of the 5 stage pipeline.
You should read an elementary comp arch book and a more sophisticated
one (H&P is good ) before posting questions.