PC- relative memory question

[chang]

Hi ,

I am very new in this area.
Can you please help me to know this solution : How to calculate this
one :-

---->>A PC- relative mode branch instruction is stored in memory at
address 62010 The branch is made to location 53010. The address field
in the instruction is 10 bits long. What is the binary value in the
instruction?

I am looking forward to you and please let me know the procedure .

Thanks
Chang

[EricP]

What do _you_ think it is, and why?

Eric

[MitchAlsup]

A) we don't know if 62010 and 53010 are octal, decimal, or hexidecimal
B) we don't know if the PC-relative offset is in little endian or big
endian notation
C) we don't know what instruction set you are using
D) we don't know if we have to subtract the length of the instruction
from the difference in relative addresses
E) we don't know if the machine immediates are twos-complement, ones-
complement, or sign-magnitude

But it does not appear that one can place the PC- relative offset into
10-bits in any of the three formats--so it looks you are SoL.

[Terje Mathisen]

It just _might_ be possible, IF the addresses are octal and all
instructions are 32-bit or wider, and the relative offset is shifted by
2 (32-bit branch target alignment) or 3 (64-bit branch alignment).

Terje

--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"

[Gavin Scott]

Google suggests the OP's question is problem 11.6 from page 413 of
Computer Organization and Architecture: Designing for Performance
by William Stallings.

I note that the Amazon reviews generally fault the exercises in the
book for being un-answerable based on the content of the associated
chapter.

G.

P.S. comp.arch's reputation for creative answers to homework questions
seems to be falling down again.

[EricP]

Terje Mathisen wrote:
> MitchAlsup wrote:
>> A) we don't know if 62010 and 53010 are octal, decimal, or hexidecimal
>> B) we don't know if the PC-relative offset is in little endian or big
>> endian notation
>> C) we don't know what instruction set you are using
>> D) we don't know if we have to subtract the length of the instruction
>> from the difference in relative addresses
>> E) we don't know if the machine immediates are twos-complement, ones-
>> complement, or sign-magnitude
>>
>> But it does not appear that one can place the PC- relative offset into
>> 10-bits in any of the three formats--so it looks you are SoL.
>
> It just _might_ be possible, IF the addresses are octal and all
> instructions are 32-bit or wider, and the relative offset is shifted by
> 2 (32-bit branch target alignment) or 3 (64-bit branch alignment).

Hmmm... In octal
(62010 - 53010) /4 = 1600
which is 10 bits but is missing a sign bit.

On the other hand, I recall reading an IBM patent
for a Skip instruction which only went forward
(circa 1968 to 1972 or so).
(Now I personally think that is a pretty crappy
patent, being just half a branch instruction,
but who the hell am I to judge patents)

Sooo.... it has to be on a particular machine,
which ever one implemented that IBM patent.
And that would resolve all Mitch's questions
once we find out the model number.

Eric

[Jeremy Linton]

Gavin Scott wrote:
> Google suggests the OP's question is problem 11.6 from page 413 of
> Computer Organization and Architecture: Designing for Performance
> by William Stallings.

LOL, I looked it up, surprised that such a question would be asked in
exactly that format ( editors, 5th edition, etc ).

Anyway, here is my solution! Why not have an arbitary branch target
granularity, say 32 bytes? That way the actual branch target is 52992,
then you can represent the offset from any instruction between
61984->62015 to 52992 as an offset of 281. That fits in 9 bits leaving
space for a sign bit!

After looking at the original text, I got a good laugh at the "mistake"
made in the posting. Now I'm disturbed...

[divyanis...@gmail.com]

Assuming offset is stored in 2's compliment because it should be signed number it can be negative for branch before and positive for branch after

EA for pc address = next instruction address + offset(signed number)

next instruction address (assuming one instruction per address) = 621
EA we have been given as 530 that is it branches to this address
so 530 - 621 = offset
offset = -91
two's compliment of -91 = 1110100101