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ASM hardware language definition file for Altera/Xilinx

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Weng Tianxiang

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Jan 2, 2010, 1:21:43 PM1/2/10
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Hi,
I need to write ASM hardware language for circuits. I wrote a lot
about 10 years ago for Altera chip. Now I couldn't find the ASM
hardware language definition file from Altera/Xilinx.

Please help give a connection.

Thank you.

Weng

glen herrmannsfeldt

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Jan 2, 2010, 2:56:33 PM1/2/10
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Weng Tianxiang <wtx...@gmail.com> wrote:

> I need to write ASM hardware language for circuits. I wrote a lot
> about 10 years ago for Altera chip. Now I couldn't find the ASM
> hardware language definition file from Altera/Xilinx.

I remember from XC4000 days the editor that would let one examine
and modify the design at a very low level. I also used it to
generate macros at a low level and instatiate those macros from
high level verilog code. I never knew that called ASM, though.

There are also the netlists, with the lowest one at the CLB or
LUT level, which one might also be able to read, write, or modify.

At FPGA densities, that is rarely useful or necessary.

For lower density CPLD devices, I believe there is still a low
level language to describe the design.

-- glen

grigio

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Jan 6, 2010, 3:19:42 AM1/6/10
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On 2 Gen, 19:21, Weng Tianxiang <wtx...@gmail.com> wrote:
> Hi,
> I need to write ASM hardware language for circuits. I wrote a lot
> about 10 years ago for Altera chip. Now I couldn't find the ASM
> hardware language definition file from Altera/Xilinx.

Perhaps PALASM?

Weng Tianxiang

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Jan 6, 2010, 11:38:24 AM1/6/10
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Yes, it is similar language, but Altera has its own language name, and
not called PALASM.

Weng

RCIngham

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Jan 7, 2010, 5:41:56 AM1/7/10
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Do you mean AHDL?


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Weng Tianxiang

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Jan 7, 2010, 11:02:33 AM1/7/10
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Hi,
Thank you. It is AHDL. Where can I find its definition file now?

Weng

RCIngham

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Jan 7, 2010, 11:59:16 AM1/7/10
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>On Jan 7, 2:41=A0am, "RCIngham" <robert.ing...@gmail.com> wrote:

>> >On Jan 6, 12:19=3DA0am, grigio <crowne...@gmail.com> wrote:
>> >> On 2 Gen, 19:21, Weng Tianxiang <wtx...@gmail.com> wrote:
>>
>> >> > Hi,
>> >> > I need to write ASM hardware language for circuits. I wrote a lot
>> >> > about 10 years ago for Altera chip. Now I couldn't find the ASM
>> >> > hardware language definition file from Altera/Xilinx.
>>
>> >> Perhaps PALASM?
>>
>> >Yes, it is similar language, but Altera has its own language name, and
>> >not called PALASM.
>>
>> >Weng
>>
>> Do you mean AHDL?
>>
>> --------------------------------------- =A0 =A0 =A0 =A0

>> This message was sent using the comp.arch.fpga web interface
onhttp://www=

>.FPGARelated.com
>
>Hi,
>Thank you. It is AHDL. Where can I find its definition file now?
>
>Weng
>

I suggest that you start at:
http://quartushelp.altera.com/current/mergedProjects/hdl/ahdl/ahdl_intro.htm

If you have QuartusII on your local PC, the same information should be in
its help files.

Weng Tianxiang

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Jan 7, 2010, 10:46:26 PM1/7/10
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On Jan 7, 8:59 am, "RCIngham" <robert.ing...@gmail.com> wrote:
> >On Jan 7, 2:41=A0am, "RCIngham" <robert.ing...@gmail.com> wrote:
> >> >On Jan 6, 12:19=3DA0am, grigio <crowne...@gmail.com> wrote:
> >> >> On 2 Gen, 19:21, Weng Tianxiang <wtx...@gmail.com> wrote:
>
> >> >> > Hi,
> >> >> > I need to write ASM hardware language for circuits. I wrote a lot
> >> >> > about 10 years ago for Altera chip. Now I couldn't find the ASM
> >> >> > hardware language definition file from Altera/Xilinx.
>
> >> >> Perhaps PALASM?
>
> >> >Yes, it is similar language, but Altera has its own language name, and
> >> >not called PALASM.
>
> >> >Weng
>
> >> Do you mean AHDL?
>
> >> --------------------------------------- =A0 =A0 =A0 =A0
> >> This message was sent using the comp.arch.fpga web interface
> onhttp://www=
> >.FPGARelated.com
>
> >Hi,
> >Thank you. It is AHDL. Where can I find its definition file now?
>
> >Weng
>
> I suggest that you start at:http://quartushelp.altera.com/current/mergedProjects/hdl/ahdl/ahdl_in...

>
> If you have QuartusII on your local PC, the same information should be in
> its help files.
>
> ---------------------------------------        
> This message was sent using the comp.arch.fpga web interface onhttp://www.FPGARelated.com

Hi,
Thank you. That is what I want.

Weng

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