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ieee1284

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Fabrizio Mezzetti

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Apr 10, 2003, 8:17:56 AM4/10/03
to
Hi my name is Fabrizio and I'm student. I must implementation standard
parallel port (slave) ieee1284 on FPGA.
someone can gives some idea and to suggest to me some interesting web site
one to me to consult? Thanks


Laurent Gauch, Amontec

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Apr 10, 2003, 12:47:39 PM4/10/03
to Fabrizio Mezzetti
Fabrizio Mezzetti wrote:

for intro check
- http://www.amontec.com/ieee1284.shtml for 1284 info
- http://www.amontec.com/chameleon.shtml for 1284 applications

Our chameleon POD can be a good entry point for you.
We will add only our EPP and ECP slave core, but this will be free and
we are very busy now with all our commercial part.

Chameleon POD is based on a Xilinx coolrunner XPLA device on 1284.
We are able to config and to dialog (in SPP, EPP, ECP mode) from the
parallel port of your PC.

Chameleon POD is coming with free configurations:
RAVEN JTAG EMULATOR
WIGGLER JTAG EMULATOR
XILINX PARALLELCABLEIV
ALTERA BYTEBLASTER
ACTIVE I2C
ACTIVE ISP
ACTIVE CLOCK GEN (32 MHZ to 125KHz)
ACTIVE DDS (Direct Digital Synthesizer)
ACTIVE PSK GENERATOR

ALL OF THIS FOR ONLY $149.-

Regards,
Laurent

Georg Acher

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Apr 10, 2003, 12:56:28 PM4/10/03
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In article <Uhdla.24800$iy5.6...@twister2.libero.it>,

http://www.beyondlogic.org/epp/epp.htm
--
Georg Acher, ac...@in.tum.de
http://wwwbode.in.tum.de/~acher
"Oh no, not again !" The bowl of petunias

Fabrizio Mezzetti

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Apr 11, 2003, 3:32:55 AM4/11/03
to
thank you for your information, but now I must implementation the standard
IEEE 1284 on Altera's FPGA. How I can make? Someone knows gives some
indication to me on like writing or finding of the code? Thanks
"Georg Acher" <ac...@in.tum.de> ha scritto nel messaggio
news:b747ns$6pn$1...@wsc10.lrz-muenchen.de...

Laurent Gauch, Amontec

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Apr 11, 2003, 10:00:31 AM4/11/03
to Fabrizio Mezzetti
Fabrizio Mezzetti wrote:

> thank you for your information, but now I must implementation the standard
> IEEE 1284 on Altera's FPGA. How I can make? Someone knows gives some
> indication to me on like writing or finding of the code? Thanks

> "Georg Acher" ha scritto nel messaggio
> news:b747ns$6pn$1...@wsc10.lrz-muenchen.de...
>
> >In article ,

> >http://www.beyondlogic.org/epp/epp.htm
> >--
> > Georg Acher, ac...@in.tum.de
> > http://wwwbode.in.tum.de/~acher
> > "Oh no, not again !" The bowl of petunias
>
>
>

Fabrizio,

Do you have to implement SPP, EPP or ECP mode of your parallel port ?

I have some EPP VHDL code, if you want.

@+
Laurent

Fabrizio Mezzetti

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Apr 11, 2003, 11:29:05 AM4/11/03
to
Hi Laurent.
Material VHDL for EPP mode would go very well. Thanks
"Laurent Gauch, Amontec" <lauren...@amontec.com> ha scritto nel
messaggio news:3E96CA7...@amontec.com...
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