DDR2 Concurrent Auto Precharge

[Mike Perkins]

I have come across a VHDL Free Model Foundry mt47h16m16.vhd which gives
me some errors.

Has anyone else used this model? If so has anyone had issues with twr
timing errors? Am I right in assuming that this model doesn't feature
Concurrent Auto Precharge?

Is DDR2 like SDR SDRAMs where some devices can cope with concurrent
auto-precharge and others not? Where if the datasheet doesn't mention
it then it's an unsupported feature?

--
Mike Perkins
Video Solutions Ltd
www.videosolutions.ltd.uk

[rickman]

On 6/13/2013 6:12 PM, Mike Perkins wrote:
> I have come across a VHDL Free Model Foundry mt47h16m16.vhd which gives
> me some errors.
>
> Has anyone else used this model? If so has anyone had issues with twr
> timing errors? Am I right in assuming that this model doesn't feature
> Concurrent Auto Precharge?
>
> Is DDR2 like SDR SDRAMs where some devices can cope with concurrent
> auto-precharge and others not? Where if the datasheet doesn't mention
> it then it's an unsupported feature?

I haven't worked with DDR2, but I have worked with SDR SDRAM. I don't
recall the specific mode you mention, but I'm pretty sure if a given
device data sheet does not mention any given feature, it isn't in the
part.

I believe these things are standardized or at least a minimum set of
features should be standardized. Using a vendor unique feature means
you are locked into that vendor. On the other hand, I believe there is
a way to read the specifics of the brand and model of RAM you are using
in a standard way. So you should be able to query the device to see if
it supports the feature you want to use.

What does the data sheet for your part say about status and
configuration settings?

--

Rick

[Mike Perkins]

On 16/06/2013 04:24, rickman wrote:
> On 6/13/2013 6:12 PM, Mike Perkins wrote:
>> I have come across a VHDL Free Model Foundry mt47h16m16.vhd which
>> gives me some errors.
>>
>> Has anyone else used this model? If so has anyone had issues with
>> twr timing errors? Am I right in assuming that this model doesn't
>> feature Concurrent Auto Precharge?
>>
>> Is DDR2 like SDR SDRAMs where some devices can cope with
>> concurrent auto-precharge and others not? Where if the datasheet
>> doesn't mention it then it's an unsupported feature?
>
> I haven't worked with DDR2, but I have worked with SDR SDRAM. I
> don't recall the specific mode you mention, but I'm pretty sure if a
> given device data sheet does not mention any given feature, it isn't
> in the part.

I know Micron SDR devices feature concurrent auto-precharge, and another
that didn't, or should I say I had a sample where it didn't work.

> I believe these things are standardized or at least a minimum set of
> features should be standardized. Using a vendor unique feature
> means you are locked into that vendor. On the other hand, I believe
> there is a way to read the specifics of the brand and model of RAM
> you are using in a standard way. So you should be able to query the
> device to see if it supports the feature you want to use.

I would have thought that in the passage of time this feature would be
an industry standard. Hence my uncertainly!

> What does the data sheet for your part say about status and
> configuration settings?
>

It's not a configuration issue, the part either support concurrent
auto-precharge or it doesn't.

The part is a Winbond W9725G6KB and I'm beginning to assume that if the
datasheet doesn't mention it then it's not a feature I can reply upon.
However the absence of any restriction of the time between two
auto-precharge instructions on different banks does tends to suggest
that concurrent auto-precharge is inherently possible.

I'm now using a Micron verilog model which is not only unencrypted but
almost holds your hand through the initialisation procedures, and tells
you what data has been written to which row and column! Superb! Being
unencrypted means I can also shorten the 200us period where the clock
must be stable for faster simulation!

[Kevin Neilson]

I've used the Micron Verilog models a couple of times. They're written in oldschool Verilog, but they're pretty good. I have to go in and change some parameters to make them work with my parts, and then they are very detailed. I also put in the Modelsim metacomment to make the RAM array sparse which speeds up the sim a lot.

[rickman]

I mean there may be a status something indicating what features are
supported. It has been a long time since I read an SDRAM data sheet,
but I recall something like this in the part I used. There were
extended bits of some sort for extended features.

> The part is a Winbond W9725G6KB and I'm beginning to assume that if the
> datasheet doesn't mention it then it's not a feature I can reply upon.
> However the absence of any restriction of the time between two
> auto-precharge instructions on different banks does tends to suggest
> that concurrent auto-precharge is inherently possible.
>
> I'm now using a Micron verilog model which is not only unencrypted but
> almost holds your hand through the initialisation procedures, and tells
> you what data has been written to which row and column! Superb! Being
> unencrypted means I can also shorten the 200us period where the clock
> must be stable for faster simulation!

--

Rick

[Mike Perkins]

Sorry, I didn't mean to be disingenuous. I'm not aware of there being a
status bit and, as I've been told, Concurrent Auto Precharge is not a
JEDEC specified feature. The only way to finding out, apart from
reading the datasheet of course, is to try and perform an Auto Precharge
on more than bank at once and see if the data is corrupted!