I have a serious trouble with my Orcad Capture V7.20.
I have a design with 5 different diagrams.
When I want to save the designs, Orcad reports the following:
Unable to save "filename"
I the Session log following errors are reported:
ERROR [DSM0006] Unable to save "filename"
ERROR [DBO3203] System error
What is wrong. I need to save the design. My backup file is 3 days old, so I
dont want to go back.
(Remove the 'xxx' to send Email)
OrCAD TechTip - Capture: [CAP0030] Unable to save page
When trying to save a design I receive the following error:
CAP0030 Unable to save page.
Capture appears unable to save the page. This error often occurs when the
relevant file is open in another application. Is there a way to fix this?
This error is a possible result of corrupt design data. To fix this, key
information in the error-prone design needs to be transferred to a new
project. To do this, follow the procedure below:
1. First open the problematic design in Capture. Make sure all of its
schematic pages are closed.
2. Create a new design and close the blank schematic page that opens
automatically; do not save it.
3. Choose Tile Vertically from the Window menu. Select all of the schematic
folders in the original design using the control key. Do not select the
4. Choose Copy from the Edit menu. In the project manager of the new design,
select the design file (it has a default name of design1) and choose Paste
from the Edit menu.
5. Select your top level schematic folder and choose Make Root from the
6. Save the new design you just created and discard the faulty one.
OrCAD users with an Extended Support Option (ESO) can find more technical
information in our Knowledge Base at http://www.orcad.com/odn/kb.
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- This TechTip is only valid for the current version of the related product.
Sarbjit Singh wrote in message ...
I would suggest that you not use Orcad for FPGA design.
I don't want to get a reputation for Orcad bashing, but I started a
project with Orcad working in a Xilinx FPGA and had to abandon Orcad
before I was done. This was primarily because of many problems with VHDL
synthesis, but there were many other problems such as the one you have
found. Orcad seems to deal with these problems by expecting the customer
to work around them. Many times Orcad did not consider the problem to be
significant enough to fix in the next release. I know this not by
assumption, but because I had many conversations with tech support where
they told me this.
I can't begin to tell you how many times Orcad crashed on my machines (I
worked on two different ones during the course of my project). I even
was able to send them a schematic which if you deleted a couple of parts
at once, would crash. Their response was that this was expected given
the "invalid state" this would put the schematic in since the parts were
heiarchical port symbols.
Orcad's response to the problem of losing data when the program crashed
so often was to tell you to save your work often. This is a practice
that I learned in the 70's programming on a mainframe. But most people
no longer consider this an adequate solution in the 90's. (But then
again I get ticked off at my ISP for not being as reliable as my
So I just gave up on Orcad and started using Xilinx Foundation. It is
certainly not bug free. But I am able to move ahead and get my work
done. With Orcad, I was stuck for as long as a day at a time trying to
find a solution to each problem.
I really don't want to be an Orcad basher. If anyone has any positive
comments about Orcad I would love to hear them. But I have posted my
complaints about Orcad to this board several times before and the only
positive comments I have received were that Orcad is OK for board level
schematic capture. It would seem that very few people use Orcad for FPGA
work, and for a reason!
remove the XY to email me.
You are getting Capture and Express mixed up! Capture is strictly a schematic
entry program and works quite well at version 7.20. The original poster should
also check to make sure that he has sufficient disk space for his output file.
Daniel Lang db...@tyrvos.caltech.edu (but remove the x)
(Remove the 'xxx' to send Email)
Rickman wrote in message <3615AB82...@yahoo.com>...
>Sarbjit Singh wrote:
>> I have a serious trouble with my Orcad Capture V7.20.
>> I have a design with 5 different diagrams.
>> When I want to save the designs, Orcad reports the following:
>> Unable to save "filename"
>> System error.
>> I the Session log following errors are reported:
>> ERROR [DSM0006] Unable to save "filename"
>> ERROR [DBO3203] System error
>> What is wrong. I need to save the design. My backup file is 3 days old,
>> dont want to go back.
>> Sarbjit Singh
>I would suggest that you not use Orcad for FPGA design.
>I don't want to get a reputation for Orcad bashing, but I started a
>project with Orcad working in a Xilinx FPGA and had to abandon Orcad
>before I was done. This was primarily because of many problems with VHDL
>synthesis, but there were many other problems such as the one you have
>found. Orcad seems to deal with these problems by expecting the customer
>to work around them. Many times Orcad did not consider the problem to be
>significant enough to fix in the next release. I know this not by
>assumption, but because I had many conversations with tech support where
>they told me this.
I am not sure why you say I am mixing the two. Some of my problems were
with the schematic capture part of the Orcad package, most were with the
VHDL synthesis engine. But the schematic capture is the same between
Capture and Express. Although I had fewer problems with schematic
capture, I still had fatal problems. The one I mentioned above kept me
down for over a day while I sent the files to Orcad and they explored
"Sarbjit Singh" <si...@bk.dk> wrote:
>I have a serious trouble with my Orcad Capture V7.20.
Sorry I don't have anything positive to say but I can back you up on the
negative side. The Capture part of Express has many bugs and
inconsistencies. It even has advertised features which are completely
I personally have found two separate bugs in Capture (submitted to Orcad)
which caused Capture to exit after trying to access memory which did not
belong to it (ie probably dereferencing a dangling pointer). In my
experience with programming this is the EASIEST kind of bug to track down
and fix. Orcad says it will fix these bugs in the next release.
The VHDL synthesis part of Express is far worse than the Capture part.
Many bugs and much crashing. The Simulate part of the Express package
was almost useable but also had some problems.
Orcad Layout is probably the most useable part of the whole suite but
again is nowhere near being as bug-free and useable as it should be.
As it stands I am rather surprised that Orcad seems to have the low
price end of the EDA market sown up. I am REALLY looking forward
to seeing things like gEDA and freeHDL get to useable state.
Erik de Castro Lopo
Fairlight ESP Pty Ltd
e.de.castro AT fairlightesp.com.au