Is there any software I can use to transform state machines in VHDL into drawings?

110 views
Skip to first unread message

Tianxiang Weng

unread,
Sep 8, 2021, 4:24:49 PMSep 8
to
Hi,
I have designed many state machines in VHDL, and I hope to use any software to transform the state machines in VHDL into drawings.

Is there any software I can use to transform state machines in VHDL into drawings?

Thank you.

Weng

kkoorndyk

unread,
Sep 9, 2021, 11:01:46 AMSep 9
to
Questasim has a FSM debugger option that generates a graphical view of your state machine, but it's not always a great view for documentation purposes.

Tianxiang Weng

unread,
Sep 9, 2021, 4:44:38 PMSep 9
to
What I have been developing is a set of new hardware circuits that have been never used. I want to apply for patents with full state machines design disclosed. For correctness, the state machines block diagrams should be consistent with the source code in VHDL. So I am seeking such tools. Now I have to draw block diagrams manually, it may introduce inconsistence.

Weng

Thomas Koenig

unread,
Sep 10, 2021, 6:24:05 AMSep 10
to
Tianxiang Weng <wtx...@gmail.com> schrieb:
You could use https://github.com/hneemann/Digital to draw your state
machines, then export to VHDL.

Tianxiang Weng

unread,
Sep 10, 2021, 3:35:24 PMSep 10
to
> > What I have been developing is a set of new hardware circuits that have been never used. I want to apply for patents with full state machines design disclosed. For correctness, the state machines block diagrams should be consistent with the source code in VHDL. So I am seeking such tools. Now I have to draw block diagrams manually, it may introduce inconsistency.
> You could use https://github.com/hneemann/Digital to draw your state
> machines, then export to VHDL.


Thomas Koenig,
I reviewed the website https://github.com/hneemann/Digital; it is a wonderful product, but I prefer my coding practice: using VHDL and drawing mutually to complete a complex state machine. I use Intel Visio to draw state machine block diagrams.

When reviewing a state machine design, it is easier to use state machine block diagrams.

Thank you.

Weng

Theo

unread,
Sep 18, 2021, 4:56:56 PMSep 18
to
Tianxiang Weng <wtx...@gmail.com> wrote:
> When reviewing a state machine design, it is easier to use state machine
> block diagrams.

A codebase I look after puts $display statements in the code that print
Graphviz code for each state in the state machine. The testbench exercises
the code to pass through all the states. When run, you pipe the output into
a .dot file and feed that into Graphviz, which will generate a PNG, SVG,
PDF of the state transition diagram.

It's a hack, but it works well enough.

Theo

Guy Eschemann

unread,
Oct 5, 2021, 7:26:31 AM (13 days ago) Oct 5
to
I believe the Sigasi editor has something like that: https://insights.sigasi.com/manual/views/#state-machine-view

Cheers,
Guy.
Reply all
Reply to author
Forward
0 new messages