T Flip Flop with Gal16v8
Frik
Has anybody created a T flip flop with a gal16v8?
I've tried:
/* Inputs */
pin 1 = clk;
/* Outputs */
pin 19 = out;
/* Logic */
out.d = !out;
with CUPL but the output seems to be metastated. No response to clk
signal either.
What is the default start up state for buffered outputs?
--
.-----------------------------------.
| FK Barnard (fkb-at-smartnet+co+za)|
`-----------------------------------'
Pascal Dornier
Frik wrote:
>
> Has anybody created a T flip flop with a gal16v8?
>
> I've tried:
>
> /* Inputs */
> pin 1 = clk;
>
> /* Outputs */
> pin 19 = out;
>
> /* Logic */
> out.d = !out;
>
> with CUPL but the output seems to be metastated. No response to clk
> signal either.
>
> What is the default start up state for buffered outputs?
Depends on the PLD. You also need to ground pin 11 (output enable) for
registered mode.
--------------------------------------------------------------------
Pascal Dornier pdor...@pcengines.com http://www.pcengines.com
Your Spec + PC Engines = Custom Embedded PC Hardware
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Andy Gulliver
Pascal Dornier wrote:
>
> Frik wrote:
> >
> > Has anybody created a T flip flop with a gal16v8?
> >
> > I've tried:
> >
> > /* Inputs */
> > pin 1 = clk;
> >
> > /* Outputs */
> > pin 19 = out;
> >
> > /* Logic */
> > out.d = !out;
> >
> > with CUPL but the output seems to be metastated. No response to clk
> > signal either.
> >
> > What is the default start up state for buffered outputs?
>
> Depends on the PLD. You also need to ground pin 11 (output enable) for
> registered mode.
is it the simulator which says it won't work, or an actual device that
doesn't work?
Whatever the initial state, those equations should give a divide by 2 on
the o/p (as long as /OE is grounded, as Pascal said). A simulator,
unless it has a default for undefined states, will complain that the
o/p is undefined because the initial state is undefined.
Some simulators will let you preset initial states, which would get
round this problem.
--
Regards
AndyG
**************************************************
*Any opinions expressed herein are entirely mine,*
*unless expressly stated otherwise. *
*(as if anybody else would admit to them.....) *
**************************************************
K. C. Lee
Frik (f...@polka.bikini) writes:
> Has anybody created a T flip flop with a gal16v8?
> I've tried:
>
> /* Inputs */
> pin 1 = clk;
>
> /* Outputs */
> pin 19 = out;
>
> /* Logic */
> out.d = !out;
>
> with CUPL but the output seems to be metastated. No response to clk
> signal either.
I don't know about CPUL, so I might get the syntax wrong. Have you tried
something like
pin 1 = clk;
pin 19 = out;
out.d := !out;
^^ --------- This tells PALASM, OPALJR that you want a registered
output. ie out is going to be !out for the next clock
|\
out = !out means: +------| >o---+
| |/ |
+-------------+
> .-----------------------------------.
> | FK Barnard (fkb-at-smartnet+co+za)|
> `-----------------------------------'
K. C. Lee
K. C. Lee
jim granville (Jim.Gr...@xtra.co.nz) writes:
>
> As the .T flipflop is very conducive to 'right first time' code, its use
> should be
> encouraged.
but once you have done D-F/F, you might still use RS F/F, but you'll never
need T flipflop. I have yet need to use T F/F or JK in my life.
> -jim
K. C. Lee
jim granville
Frik wrote:
>
> Has anybody created a T flip flop with a gal16v8?
>
> I've tried:
>
> /* Inputs */
> pin 1 = clk;
>
> /* Outputs */
> pin 19 = out;
>
> /* Logic */
> out.d = !out;
>
> with CUPL but the output seems to be metastated. No response to clk
> signal either.
>
That should toggle? - normally the Pin1 CLK is implicit on a 16V8, when
you choose any .D term.
Later CUPL's have a REGISTER_SELECT Out = 1; - See the manual.
This allows you to code
Out.T = When To Toggle;
or
Out.J = WhenTo Set;
Out.K = WhenToClear;
And CUPL will rework the eqn for a D FF.
As the .T flipflop is very conducive to 'right first time' code, its use
should be
encouraged.
-jim
>
> --
> .-----------------------------------.
> | FK Barnard (fkb-at-smartnet+co+za)|
> `-----------------------------------'
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Kevin Braun
de...@FreeNet.Carleton.CA (K. C. Lee) wrote:
>Frik (f...@polka.bikini) writes:
>> Has anybody created a T flip flop with a gal16v8?
>
>> I've tried:
>>
>> /* Inputs */
>> pin 1 = clk;
>>
>> /* Outputs */
>> pin 19 = out;
>>
>> /* Logic */
>> out.d = !out;
>>
>> with CUPL but the output seems to be metastated. No response to clk
>> signal either.
>
>I don't know about CPUL, so I might get the syntax wrong. Have you tried
>something like
>
>pin 1 = clk;
>pin 19 = out;
>
>out.d := !out;
> ^^ --------- This tells PALASM, OPALJR that you want a registered
> output. ie out is going to be !out for the next clock
>
> |\
>out = !out means: +------| >o---+
> | |/ |
> +-------------+
>
>> .-----------------------------------.
>> | FK Barnard (fkb-at-smartnet+co+za)|
>> `-----------------------------------'
>
>K. C. Lee
>
What CUPL is really complaining about is that "out.d" does not have an
initial state therefore it cannot determine what the next state should
be. In real life you may not care, but it becomes necessary when
generating test vectors.
Try
pin 1 = clk;
pin 2 = reset;
pin 19 = out;
out.d = !reset & !out;
your first vector should include "reset" being true. After the first
vector has passed, the remainder of the vectors will be ok.
As a side note: There are some configurations of the 16V8 that do not
allow for feedback on pins 12 and 19.
...kevin braun
jim granville
K. C. Lee wrote:
>
> jim granville (Jim.Gr...@xtra.co.nz) writes:
> >
> > As the .T flipflop is very conducive to 'right first time' code, its use
> > should be
> > encouraged.
>
> need T flipflop. I have yet need to use T F/F or JK in my life.
>
> > -jim
>
> K. C. Lee
Perhaps you can show how to implement a 12 Bit syncronous/Loadable
counter in an ATV750B
using just D FF ? ( target : A T FF design uses just 1 term per node )
Or maybe an U/D triangle wave counter, for micro-stepping stepper
motors, in D FF
- jim
K. C. Lee
jim granville (Jim.Gr...@xtra.co.nz) writes:
> K. C. Lee wrote:
>>
>> jim granville (Jim.Gr...@xtra.co.nz) writes:
>> >
>> > As the .T flipflop is very conducive to 'right first time' code, its use
>> > should be
>> > encouraged.
>>
>> but once you have done D-F/F, you might still use RS F/F, but you'll never
>> need T flipflop. I have yet need to use T F/F or JK in my life.
>>
>> > -jim
>>
>> K. C. Lee
> Hmmmm. Then maybe you have never tried to pack stuff into PLD's.
> Perhaps you can show how to implement a 12 Bit syncronous/Loadable
> counter in an ATV750B
but we are talking about GAL16V8 here... ;) I never claim that I have to
use an ATV750B in my life nor having to pack stuff into PLD's.
I have done DMA controller (16-bit) in semi custom chip, DMA controller
(18-bit) with the old Intel PLD both without T-flip flop.
> using just D FF ? ( target : A T FF design uses just 1 term per node )
> Or maybe an U/D triangle wave counter, for micro-stepping stepper
> motors, in D FF
Wait a minute. You don't use triangle wave for micro-stepping steppers do
you ? ;)
> - jim
K. C. Lee
Neal Becker
t = xor + d