3.3v <> 5v interfacing @ 15Mhz
Alison
Please may I ask for assistance? I need a reliable method of interfacing an
SPI SD/MMC card to a dsPIC. At the moment I'm using a 1k8/3k3 voltage
divider on the 5v ----> 3.3v signals, and connecting the 3.3v ----> 5v
signals straight to port.
It's working ok upto about 3-5Mhz, with anything above 7.5Mhz causing
misread bits. Here's the actual signals;
dsPIC --------------- SD/MMC
CLOCK (5v) ----> CLOCK (3.3v)
SPI OUT (5v) ----> DATA IN (3.3v)
CHIPSEL (5v) ----> CS (3.3v)
SPI IN (5v) <---- DATA OUT (3.3v)
Q1. Would it be an idea to reduce the values of R1/R2 in the voltage divider
to achieve faster switching?
Q2. Which commonly available ICs could perform this conversion at as much as
25Mhz?
It has also occured to me that the +5v signals of the dsPIC aren't actually
+5v. They're about 4.5v or thereabouts, making the 5v/3.3v divider kick out
about 3v on the dot.
The 5v rail is generated by a 7805 regulator with some smoothing. The 3.3v
rail is generated by a 150mA TS2950CT-3.3.
While experimenting and trying out different things before posting here, I
have used 5k pots for the voltage dividers. If I increase the output
voltage then reliability increases, I can operate at 7.5Mhz.
I have here about 5 different SD cards of different sizes and from various
manufacturers.
Q3. Which is the final and most reliable method I can use to interface
between 5v and 3.3v?
Reliability is more important than cost. This is a low run item of about
100-200 units.
With thanks,
Alison
PeteS
x-posted to s.e.d. where you are likely to get answers.
The divider you have should work fine at those speeds, with the caveat
of track length and signal capacitance. Have you looked at the signals
with a scope (using a 10x probe)?
If you use buffering, simply get 3.3V devices with 5V tolerant inputs
(all the usual suspects make them) or use transmission gates for the
path from the processor to the MMC/SD card. I am using some TI devices
in an SDIO implementation but that's because I have bidirectional data
lines.
As to the Card -> processor lines, and without looking at the DSPic
datasheet, what is the Vih spec for the DSPic inputs? If they are true
CMOS, then 3.3V is at the lowest Vih (2/3 Vcc). If they _are_ CMOS,
then you'll need to translate those as well - use a 5V device with TTL
level inputs.
Cheers
PeteS
rickman
work fine in the paths that are inputs to the 3 volt SD card. But when
you are driving out from the 3 volt SD card to the5 volt PIC, the
resistors won't boost your voltage up! You should be able to drive the
PIC directly from the SD card DATA OUT without resistors. Your problem
is not speed per se, but rather voltage level.
I have never figured out exactly what is going on in most CMOS
interfaces. They often spec them like they are TTL when they are
really symetrical CMOS. To see if your design will work without
buffers you need to check the input and output voltage levels on the
two devices and see if they are compatible. Even if you can get it to
work on your bench, if you have too little noise margin it can fail in
the field when the temperature changes or the PSU ages and the supply
voltage changes.
I took a look at the dsPIC33F and it uses CMOS input specs of 0.2/0.8 x
Vdd, but TTL output specs of 0.4/2.4 volts. Their input and output
specs are not compatible with itself! With a 5 volt supply the input
high threshold is 4 volts, so you don't have a hope of meeting this
with a 3.3 device. You will need 5 volt buffers with TTL level input
voltages.
It also says this part uses a 3.3 volt only supply. So something is
rotten in Denmark. Why are you using 5 volts on the dsPIC in the first
place? I see that the dsPIC30 will work up to 5 volts. Why not use a
3.3 volt part instead?
Alison
news:1164460050....@l39g2000cwd.googlegroups.com...
>
Hi Pete, thanks for your reply
> x-posted to s.e.d. where you are likely to get answers.
>
> The divider you have should work fine at those speeds, with the caveat
> of track length and signal capacitance. Have you looked at the signals
> with a scope (using a 10x probe)?
I'll try to get the scope back this weekend. I've been using a logic
analyser for almost everything in this project.
> If you use buffering, simply get 3.3V devices with 5V tolerant inputs
> (all the usual suspects make them) or use transmission gates for the
> path from the processor to the MMC/SD card. I am using some TI devices
> in an SDIO implementation but that's because I have bidirectional data
> lines.
Nods
>
> As to the Card -> processor lines, and without looking at the DSPic
> datasheet, what is the Vih spec for the DSPic inputs? If they are true
> CMOS, then 3.3V is at the lowest Vih (2/3 Vcc). If they _are_ CMOS,
> then you'll need to translate those as well - use a 5V device with TTL
> level inputs.
The ports are ST: Schmitt Trigger input with CMOS levels. ViH is... 0.8v
So it should be fine. But.. I have a 100 Ohm resistor on the 3.3v DATA OUT
line which connects in series to the dsPIC input port. If I do not do this
then communication becomes even more unreliable. Most of the diagrams on
the net do not have any kind of buffering on this line. I added it as a
guess.
My plan of action today is to build a piggyback board to go inbetween the
dsPIC and main breadboard. The purpose of this is to reduce the uncertainty
as much as possible. The SD card will be within about 1cm of the dsPIC
rather than about 10cm away as at present on the end of solid signal wire.
Does that sound like a likely culprit? Breadboards have always been fine
here for low Mhz kit prior to getting them onto PCBs, and this is the first
time I've really pushed passed about 5Mhz in a design. The SD card has to
be as close as directly possible to the dsPIC to maintain reliability at
high Mhz?
> Cheers
>
> PeteS
>
no, thank you.
Alison
news:1164465685.7...@j72g2000cwa.googlegroups.com...
Hi Rickman,
> You don't say exactly where you are putting the resistors.
As per this diagram here; http://www.captain.at/electronics/pic-mmc/
This is further information on the interfacing;
http://www.k9spud.com/sdcard/
> They should
> work fine in the paths that are inputs to the 3 volt SD card. But when
> you are driving out from the 3 volt SD card to the5 volt PIC, the
> resistors won't boost your voltage up! You should be able to drive the
> PIC directly from the SD card DATA OUT without resistors. Your problem
> is not speed per se, but rather voltage level.
I'm not trying to boost the voltages up. It works fine upto about 7Mhz.
I'm wondering if it would be *better* to use a specific IC 3.3v/5v bus
transceiver when running at upto 25Mhz.
If I don't buffer the 3.3v to 5v line then the errors increase. All of the
Microchip documents and examples on the net 3.3v to 5v lines are connected
directly.
> I have never figured out exactly what is going on in most CMOS
> interfaces. They often spec them like they are TTL when they are
> really symetrical CMOS. To see if your design will work without
> buffers you need to check the input and output voltage levels on the
> two devices and see if they are compatible. Even if you can get it to
> work on your bench, if you have too little noise margin it can fail in
> the field when the temperature changes or the PSU ages and the supply
> voltage changes.
>
> I took a look at the dsPIC33F and it uses CMOS input specs of 0.2/0.8 x
> Vdd, but TTL output specs of 0.4/2.4 volts. Their input and output
> specs are not compatible with itself! With a 5 volt supply the input
> high threshold is 4 volts, so you don't have a hope of meeting this
> with a 3.3 device. You will need 5 volt buffers with TTL level input
> voltages.
The ViH is 0.8v.
> It also says this part uses a 3.3 volt only supply. So something is
> rotten in Denmark. Why are you using 5 volts on the dsPIC in the first
> place?
It is indeed a 5v device.
I see that the dsPIC30 will work up to 5 volts. Why not use a
> 3.3 volt part instead?
The 3.3v parts won't run upto 30/40MIPS which defeats the object of a dsp.
It is interfacing to a 68000 DMA processor bus with rise times of about 15nS
so I have to have the MIPS. That is a 5v TTL bus. So given that there's 30
data lines there, and only 4 on the SD card, it's clear which one gets
converted. That side of the bridge has been completed and is working.
CBFalconer
>
> Please may I ask for assistance? I need a reliable method of
> interfacing an SPI SD/MMC card to a dsPIC. At the moment I'm
> using a 1k8/3k3 voltage divider on the 5v ----> 3.3v signals,
> and connecting the 3.3v ----> 5v signals straight to port.
>
> It's working ok upto about 3-5Mhz, with anything above 7.5Mhz
> causing misread bits. Here's the actual signals;
You have effectively supplied 3.3 V through about 1k. The chip
uses more current as the frequency increases, thus dropping the
supply voltage. You would be better off using an emitter follower
to supply the current, driving it from that divider with a diode
added for Vbe and thermal compensation.
--
Chuck F (cbfalconer at maineline dot net)
Available for consulting/temporary embedded and systems.
<http://cbfalconer.home.att.net>
Joe G (Home)
http://www.standardics.nxp.com/products/levelshifters/
http://www.standardics.nxp.com/products/gtl/voltageclamps/
http://www.standardics.nxp.com/support/documents/logic/pdf/an10156.pdf
http://www.standardics.nxp.com/support/documents/logic/pdf/an10145.pdf
"Alison" <ali...@logicsaysNOSPAM.com> wrote in message
news:xLGdnSljmrn...@bt.com...
Yuriy K.
> Hi,
>
> Please may I ask for assistance? I need a reliable method of interfacing an
> SPI SD/MMC card to a dsPIC. At the moment I'm using a 1k8/3k3 voltage
> divider on the 5v ----> 3.3v signals, and connecting the 3.3v ----> 5v
> signals straight to port.
>
> It's working ok upto about 3-5Mhz, with anything above 7.5Mhz causing
> misread bits. Here's the actual signals;
>
> dsPIC --------------- SD/MMC
> CLOCK (5v) ----> CLOCK (3.3v)
> SPI OUT (5v) ----> DATA IN (3.3v)
> CHIPSEL (5v) ----> CS (3.3v)
SN74LVC04A @ 3.3Vcc
Use two inverters in series as a 5V tolerant follower
SN74LVC3G34 @ 3.3Vcc - three followers.
> SPI IN (5v) <---- DATA OUT (3.3v)
SN74AHCT1G125 @ 5Vcc - 3.3V input levels
> Q1. Would it be an idea to reduce the values of R1/R2 in the voltage divider
> to achieve faster switching?
@ 25MHz - I doubt it.
> Q2. Which commonly available ICs could perform this conversion at as much as
> 25Mhz?
See above. They are available from Digikey.
> Q3. Which is the final and most reliable method I can use to interface
> between 5v and 3.3v?
Use an appropriate logic ICs for voltage translation.
> Reliability is more important than cost. This is a low run item of about
> 100-200 units.
Then use the ICs I mentioned above. They will work up to 30+MHz
and easily available from catalog suppliers like Digikey and Mouser.
--
WBR, Yuriy.
"Resistance is futile"
rickman
> rickman <gnu...@gmail.com> wrote in message
> news:1164465685.7...@j72g2000cwa.googlegroups.com...
>
> Hi Rickman,
>
> > You don't say exactly where you are putting the resistors.
>
> As per this diagram here; http://www.captain.at/electronics/pic-mmc/
>
> This is further information on the interfacing;
> http://www.k9spud.com/sdcard/
Ok, so you are dropping the 5 volt outputs from the PIC (not dsPIC from
your diagram) to the SD card and running directly from the SD card to
the PIC. In general, that should be ok. You will not see any problems
from this approach if you voltage levels are ok, which I can't verify
since there seems to be some confusion about which PIC you are using.
Can you give an exact part number?
> I'm not trying to boost the voltages up. It works fine upto about 7Mhz.
> I'm wondering if it would be *better* to use a specific IC 3.3v/5v bus
> transceiver when running at upto 25Mhz.
>
> If I don't buffer the 3.3v to 5v line then the errors increase. All of the
> Microchip documents and examples on the net 3.3v to 5v lines are connected
> directly.
Typically, the input high voltage threshold is held to 2.4 volts which
allows the parts to work with TTL and 3.3 volt CMOS. But in reality
the parts are CMOS and the FETs have to be made assymetrical to do
this. Often the inputs are left as CMOS inputs which are not
compatible with TTL outputs. What is the static voltage on the DATA
OUT from the SD card?
> The ViH is 0.8v.
Since I don't know which PIC you are using, I don't know what the ViH
is, but I can assure you it is *NOT* 0.8 volts. That would be a
realistic ViL perhaps.
> > It also says this part uses a 3.3 volt only supply. So something is
> > rotten in Denmark. Why are you using 5 volts on the dsPIC in the first
> > place?
>
> It is indeed a 5v device.
But which device? The data sheet on the dsPIC33F shows a 40 MIP rating
at 3.3 volts.
TABLE 26-1: OPERATING MIPS VS. VOLTAGE
Max MIPS
dsPIC33F
DC5 3.0-3.6V -40°C to +85°C 40
Perhaps all you need to do is switch PIC devices?
> I see that the dsPIC30 will work up to 5 volts. Why not use a
> > 3.3 volt part instead?
>
> The 3.3v parts won't run upto 30/40MIPS which defeats the object of a dsp.
> It is interfacing to a 68000 DMA processor bus with rise times of about 15nS
> so I have to have the MIPS. That is a 5v TTL bus. So given that there's 30
> data lines there, and only 4 on the SD card, it's clear which one gets
> converted. That side of the bridge has been completed and is working.
Ok, that is clear. But I don't think the issue is dropping the 5 volt
signals to 3.3 volts. The resistors will do that just fine. I suggest
that you focus on the voltage level of the signal from the 3.3 volt
side to the 5 volt side. You will likely need a buffer here to provide
the 4 volts required to drive a 5 volt CMOS input.
PeteS
> PeteS <PeterSm...@googlemail.com> wrote in message
> news:1164460050....@l39g2000cwd.googlegroups.com...
> >
>
Inline
> Hi Pete, thanks for your reply
>
> > x-posted to s.e.d. where you are likely to get answers.
> >
> > The divider you have should work fine at those speeds, with the caveat
> > of track length and signal capacitance. Have you looked at the signals
> > with a scope (using a 10x probe)?
>
> I'll try to get the scope back this weekend. I've been using a logic
> analyser for almost everything in this project.
The limits of analysers is that they don't detect actual voltage
levels, of course, beyond what they have been set up for as a switching
threshold.
>
> > If you use buffering, simply get 3.3V devices with 5V tolerant inputs
> > (all the usual suspects make them) or use transmission gates for the
> > path from the processor to the MMC/SD card. I am using some TI devices
> > in an SDIO implementation but that's because I have bidirectional data
> > lines.
>
> Nods
>
> >
> > As to the Card -> processor lines, and without looking at the DSPic
> > datasheet, what is the Vih spec for the DSPic inputs? If they are true
> > CMOS, then 3.3V is at the lowest Vih (2/3 Vcc). If they _are_ CMOS,
> > then you'll need to translate those as well - use a 5V device with TTL
> > level inputs.
>
> The ports are ST: Schmitt Trigger input with CMOS levels. ViH is... 0.8v
>
0.8V would be ViL (max), not ViH(min).
> So it should be fine. But.. I have a 100 Ohm resistor on the 3.3v DATA OUT
> line which connects in series to the dsPIC input port. If I do not do this
> then communication becomes even more unreliable. Most of the diagrams on
> the net do not have any kind of buffering on this line. I added it as a
> guess.
Which indicates ringing on the line without the resistor.
>
> My plan of action today is to build a piggyback board to go inbetween the
> dsPIC and main breadboard. The purpose of this is to reduce the uncertainty
> as much as possible. The SD card will be within about 1cm of the dsPIC
> rather than about 10cm away as at present on the end of solid signal wire.
10cm on breadboard might be ok if the wires are routed appropriately.
As I note above, you seem to have ringing on the line. Try a 22 ohm
series resistor - that's what I have apart from the 4k7 (mostly)
pullups. A 10 - 22pF loading cap might help too, although you should
not need it on a properly laid out PCB.
>
> Does that sound like a likely culprit? Breadboards have always been fine
> here for low Mhz kit prior to getting them onto PCBs, and this is the first
> time I've really pushed passed about 5Mhz in a design. The SD card has to
> be as close as directly possible to the dsPIC to maintain reliability at
> high Mhz?
Once on a circuit board, 10cm is not a long way at 25MHz, but you
should probably set the line impedance controlled and terminate at each
end. Without looking at the datasheets I can't give any direct
assistance (and as I have to make dinner shortly I don't have the time
;)
Cheers
PeteS
Vladimir Vassilevsky
Alison wrote:
> Please may I ask for assistance? I need a reliable method of interfacing an
> SPI SD/MMC card to a dsPIC. At the moment I'm using a 1k8/3k3 voltage
> divider on the 5v ----> 3.3v signals, and connecting the 3.3v ----> 5v
> signals straight to port.
[...]
> Q1. Would it be an idea to reduce the values of R1/R2 in the voltage divider
> to achieve faster switching?
Interfacing fast logic signals trough the voltage dividers is a bad
idea. You can get with the solutions like that at 100kHz, but not at
25MHz. Interfacing to a removable card in that way is even worse idea.
> Q2. Which commonly available ICs could perform this conversion at as much as
> 25Mhz?
Using a buffer IC is the way to go. Consider 74HCT or 74LV series.
> Reliability is more important than cost.
Then you shoud definitely use the buffers.
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
Alison
> Inline
>
> The limits of analysers is that they don't detect actual voltage
> levels, of course, beyond what they have been set up for as a switching
> threshold.
>
Nods. I need to pickup the scope. Normally I wouldn't be doing
electronics, my understanding is basic. I'm the developer :-) The
electronics engineer is going through a mid-life-crisis and doesn't want to
do electronics as it's not making him happy :-)
> 0.8V would be ViL (max), not ViH(min).
>
This is where the that 0.8v ViH figure came from;
http://www.retro.dial.pipex.com/io_volts.jpg
That's a page from the dsPIC4013 manual. 70138D.pdf
> Which indicates ringing on the line without the resistor.
>
That answers that then. That sounds good.
> 10cm on breadboard might be ok if the wires are routed appropriately.
> As I note above, you seem to have ringing on the line. Try a 22 ohm
> series resistor - that's what I have apart from the 4k7 (mostly)
> pullups. A 10 - 22pF loading cap might help too, although you should
> not need it on a properly laid out PCB.
>
I'll look into that. I'm making a piggy back board to go straight under the
chip at the moment, so that the card is connected with solid copper.
I'm preparing myself to go for a buffer.
>
> Once on a circuit board, 10cm is not a long way at 25MHz, but you
> should probably set the line impedance controlled and terminate at each
> end. Without looking at the datasheets I can't give any direct
> assistance (and as I have to make dinner shortly I don't have the time
> ;)
>
It'll go onto it's prototype pcb once I've cleared up some of this.
Hope you enjoyed it. We made turkey vegetable things on scewers. ;)
Alison
news:45686b1e$0$9773$afc3...@news.optusnet.com.au...
> Level shifters may do the trick
>
> http://www.standardics.nxp.com/products/levelshifters/
>
> http://www.standardics.nxp.com/products/gtl/voltageclamps/
>
> http://www.standardics.nxp.com/support/documents/logic/pdf/an10156.pdf
>
> http://www.standardics.nxp.com/support/documents/logic/pdf/an10145.pdf
>
Thanks Joe, will read up shortly. :-)
Alison
news:99%9h.209$Py2...@newssvr27.news.prodigy.net...
Hi Vladimir,
>
> Using a buffer IC is the way to go. Consider 74HCT or 74LV series.
>
>
> Then you shoud definitely use the buffers.
Would it be ok to suggest the most suitable ones from this list?
http://www.rapidonline.com/productinfo.aspx?moduleno=67459
I have an account there and they're local so I can pickup on Monday a.m.
Thanks :)
Alison
rickman
> PeteS <PeterSm...@googlemail.com> wrote in message
> news:1164475326....@f16g2000cwb.googlegroups.com...
> > Inline
> >
> > The limits of analysers is that they don't detect actual voltage
> > levels, of course, beyond what they have been set up for as a switching
> > threshold.
> >
>
> Nods. I need to pickup the scope. Normally I wouldn't be doing
> electronics, my understanding is basic. I'm the developer :-) The
> electronics engineer is going through a mid-life-crisis and doesn't want to
> do electronics as it's not making him happy :-)
You might be better off finding someone else who is qualified.
Although this does not sound like a complex design, even simple logic
level interfacing is not hard to do wrong.
> > 0.8V would be ViL (max), not ViH(min).
> >
>
> This is where the that 0.8v ViH figure came from;
> http://www.retro.dial.pipex.com/io_volts.jpg
>
> That's a page from the dsPIC4013 manual. 70138D.pdf
Yes, notice that the table says 0.8 Vdd, not 0.8 volts. That means the
input thresholds are relative to the magnatude of the Vdd supply. In
your case it would be 4.0 volts. No 3.3 volt logic will supply this
high an output signal. If you want to meet the spec, you will need a
dual supply level shifter on the DATA OUT signal from the SD Card. Or
you can just use a transistor. A simple NPN transistor with two
resistors will do the job as well if not better than a buffer. If you
can't handle the inversion in software, you will need two transistors
and three resistors.
> > Which indicates ringing on the line without the resistor.
> >
>
> That answers that then. That sounds good.
"Indicates" and "is" are two different things. Diagnose ringing with a
scope. I seriously doubt that you have enough ringing to cause a
problem. Even if you had some ringing on the DATA OUT line, unless it
were very severe, it would only delay the settling time. At the rates
you are working at it is not likely that this truely is the cause of
your problem. I suspect it is more likely that the ViH vs. VoH are
what is hurting you. But the scope and/or volt meter will tell you
better. When the output rises, the initial slope is fairly rapid, but
it slows as it approaches Vdd. So if the clock is slow enough the VoH
has risen to the full Vdd. With a faster clock the data is sampled on
the still rising edge and may not have made it to the actual threshold
voltage of the PIC input.
> I'll look into that. I'm making a piggy back board to go straight under the
> chip at the moment, so that the card is connected with solid copper.
>
> I'm preparing myself to go for a buffer.
Make sure it is powered by 5 volts and the output rises fully to Vdd.
Also make sure the input is compatible with 3.3 volt logic. I am
pretty confident you can live a rich full life on this signal without a
series resistor once you get the voltage levels correct.
Alison
>
> You might be better off finding someone else who is qualified.
> Although this does not sound like a complex design, even simple logic
> level interfacing is not hard to do wrong.
>
That's not an option. My main job is as an adult escort and I've recently
come back from Dubai for £3k. Nose through my /pub directory. There is no
one else. No ones going to work on a project for 20y.o. Atari computers.
This is out of enjoyment to achieve something other than wandering around
shops buying underwear all day. ;-) I have a Computer Science degree which
is useless, I did it because I enjoyed working with computers and
simplicity, not jumping through corporate hoops for Directors who can just
about type with one finger.
This is just enjoyment and achievement for me to do something more.
>
> Yes, notice that the table says 0.8 Vdd, not 0.8 volts. That means the
> input thresholds are relative to the magnatude of the Vdd supply. In
> your case it would be 4.0 volts. No 3.3 volt logic will supply this
> high an output signal. If you want to meet the spec, you will need a
> dual supply level shifter on the DATA OUT signal from the SD Card. Or
> you can just use a transistor. A simple NPN transistor with two
> resistors will do the job as well if not better than a buffer. If you
> can't handle the inversion in software, you will need two transistors
> and three resistors.
>
I have no control over the interface. It's a hardware implemented SPI port.
The closest I come is to the transmit and receive registers.
>
>
> Make sure it is powered by 5 volts and the output rises fully to Vdd.
> Also make sure the input is compatible with 3.3 volt logic. I am
> pretty confident you can live a rich full life on this signal without a
> series resistor once you get the voltage levels correct.
>
SUCCESS!!
CPU Powered Up. [ DONE ]
Powering Down SD Card. [ DONE ]
Powering Up SD Card. [ DONE ]
Resetting SD Card. [ DONE ]
Sending CMD0x00. [ DONE ]
Expecting 0x01 Response Token from CMD0. [ PASS ]
Sending CMD0x01. [ DONE ]
Expecting Valid Response Token from CMD1. [ WAIT ]
Sending CMD0x01. [ DONE ]
Expecting Valid Response Token from CMD1. [ PASS ]
Sending CMD0x09. [ DONE ]
00 26 00 32 1F 59 83 B7 E3 91 CF FF 92 40 40 11 9E AC FF
Storage Capacity Calculated in Megabytes. [ 0491 ]
Sending CMD0x09. [ DONE ]
00 26 00 32 1F 59 83 B7 E3 91 CF FF 92 40 40 11 9E AC FF
Increasing CLK Rate to 7.5Mhz. [ DONE ]
Sending CMD0x09. [ DONE ]
00 26 00 32 1F 59 83 B7 E3 91 CF FF 92 40 40 11 9E AC FF
Increasing CLK Rate to 15Mhz. [ DONE ]
Sending CMD0x09. [ DONE ]
00 26 00 32 1F 59 83 B7 E3 91 CF FF 92 40 40 11 9E AC FF
You're not going to like how I did it though......
The voltage dividers I've replaced with 5k 18-turn pots. They're set to
kick out about 4.2v at the moment having checked on the meter, that's the
CHIP SELECT, DATA IN, and, CLOCK lines. The 100ohm resister has been
removed from the DATA OUT line.
It's running reliably at 15Mhz. I just kept on adjusting the pots until the
data became stable. The input lines are about 4v. Mmmmmm. Maybe... The
DATA OUT is being driven higher now... The DO is being driven higher, about
4.2v
What does that tell you about the signals?
I have lots of transistors here, bags of different sorts from a workshop
clearance a few years ago BC547C ??
Thanks,
Alison
Alison
news:1164488077.7...@h54g2000cwb.googlegroups.com...
> Yes, notice that the table says 0.8 Vdd, not 0.8 volts. That means the
> input thresholds are relative to the magnatude of the Vdd supply. In
> your case it would be 4.0 volts. No 3.3 volt logic will supply this
> high an output signal. If you want to meet the spec, you will need a
> dual supply level shifter on the DATA OUT signal from the SD Card. Or
> you can just use a transistor. A simple NPN transistor with two
> resistors will do the job as well if not better than a buffer. If you
> can't handle the inversion in software, you will need two transistors
> and three resistors.
>
>
Hi Rickman... ;-)
Could you elaborate on this? I can do this now but I'm not sure what goes
where in terms of;
R1 R2 R3 T1 T2
Roughly what values? and where do things go, BCE?
I'm fully stocked on resistors, and have quite alot of different PNPs and
NPNs.
Alison
rickman
> rickman <gnu...@gmail.com> wrote in message
> news:1164488077.7...@h54g2000cwb.googlegroups.com...
> >
> > You might be better off finding someone else who is qualified.
> > Although this does not sound like a complex design, even simple logic
> > level interfacing is not hard to do wrong.
> >
>
> That's not an option. My main job is as an adult escort and I've recently
> come back from Dubai for £3k. Nose through my /pub directory.
Interesting. I checked out every file including the logs. I can't say
I feel your pain, but I get the idea.
> There is no
> one else. No ones going to work on a project for 20y.o. Atari computers.
If it's a paying job they will!
> This is out of enjoyment to achieve something other than wandering around
> shops buying underwear all day. ;-) I have a Computer Science degree which
> is useless, I did it because I enjoyed working with computers and
> simplicity, not jumping through corporate hoops for Directors who can just
> about type with one finger.
Tell me about it. I am at a point where I could retire if I wanted to.
I have found that jobs provide little satisfaction and I am about fed
up with it. Too bad I'm too old to do what you do!
> This is just enjoyment and achievement for me to do something more.
Well, you may not like what I am going to tell you.
> > Yes, notice that the table says 0.8 Vdd, not 0.8 volts. That means the
> > input thresholds are relative to the magnatude of the Vdd supply. In
> > your case it would be 4.0 volts. No 3.3 volt logic will supply this
> > high an output signal. If you want to meet the spec, you will need a
> > dual supply level shifter on the DATA OUT signal from the SD Card. Or
> > you can just use a transistor. A simple NPN transistor with two
> > resistors will do the job as well if not better than a buffer. If you
> > can't handle the inversion in software, you will need two transistors
> > and three resistors.
> >
>
> I have no control over the interface. It's a hardware implemented SPI port.
> The closest I come is to the transmit and receive registers.
That is the point of interface where you can invert the data if you
want. But it is 6 of one and half dozen of the other. You can get a
dual buffer in a package as small as a transitor if I can remember
which one we use a lot. It is tolerant of up to +-7 volts on the
input, but what you need is for it to be 5 volt powered and I don't
recall if it is.
Here is a dual N-FET which does not need the input resistor. EM6K1 is
in stock at digikey. Or if that package is too small for you to
solder, the FDC6305N is a bit larger and should work too. Just connect
one FET input to the DATA OUT signal (a light pulldown will keep it
from floating when the SD card is not inserted) with a pullup resistor
to 5 volts. Connect the other FET to the first drain in the same
manner with the second drain to the PIC input. This will give you a
clean 5 volt transistion and your problems should be solved.
No, I don't like how you did it. And you won't like why it works. By
driving the SD card inputs to 4.2 volts you are forward biasing the
protection diodes in the SD card. This pulls the Vdd on the card up
higher so that the output voltage is higher. This is *very* bad.
Don't expect your card to live a rich full life if you continue to do
this.
Much better would be to use a buffer on the DO output or to use the
transistors. The BC547C should work just fine. The package is a bit
large, but I guess that is not an issue. Connect two of them in the
same manner as above, but with a 1 Kohm resistor in series with the
base of the first. Use 1 Kohms for the two pullups and you can ignore
the series resistor on the second.
It is hard to describe well, so I made a drawing.
rickman
The drawing from my other post did not inititially include the BCE
markings, so I added them. You can check the data sheet for the part
to see where each function is on the package. This will be very
non-critical in terms of transistor selected or resistor value. Just
make sure you use an NPN or N-channel device.
Alison
Alison wrote:
>It is hard to describe well, so I made a drawing.
>http://www.arius.com/Transistor_Buffer.png
Hi Rickman,
thanks :-)
I've since tried a 7407 out of my junk box which I've found out why it was
in there, it's a dud.
A level shifter is another option? I've seen mention of a zener and two
resisters, yet have as yet to get past companies wanting to sell me examples
and datasheets..
The 4.2v has been dropped back down to 3.3v but in my mind it makes me
believe that the SD DATA OUT was the problem, in that the dsPIC wasn't
registering a '1'. I was getting impatient, and had enough cards to risk
blowing one or two.
It will reliably register a '1' at low Mhz <1 when running at 3.3v. Makes
me wonder about rise and capacitance??
Hey Rickman, thanks for checking out the /pub and replying. It's just a job
for me, it pays the bills. I've done the going into work 9-5 and working
for people that think that you just tell a computer, "Now nice new computer,
just do THIS," and that it magically does it.
My understanding here isn't hugely advanced. It's not hideously basic
either. I've had no formal training. Call it just basic practical.
tnx,
Alison
Yuriy K.
>
> Could you elaborate on this? I can do this now but I'm not sure what goes
> where in terms of;
> R1 R2 R3 T1 T2
>
> Roughly what values? and where do things go, BCE?
>
> I'm fully stocked on resistors, and have quite alot of different PNPs and
If your want a working solution, use level translation IC.
They will work up to 30+MHz and easily available from
catalog suppliers like Digikey and Mouser.
> dsPIC --------------- SD/MMC
> CLOCK (5v) ----> CLOCK (3.3v)
> SPI OUT (5v) ----> DATA IN (3.3v)
> CHIPSEL (5v) ----> CS (3.3v)
SN74LVC04A @ 3.3Vcc
Use two inverters in series as a 5V tolerant non-inverting buffer.
SN74LVC3G34 @ 3.3Vcc - three non-inverting buffer.
> SPI IN (5v) <---- DATA OUT (3.3v)
SN74AHCT1G125 @ 5Vcc - 3.3V input levels, 5V output.
Alison
>
> The drawing from my other post did not inititially include the BCE
> markings, so I added them. You can check the data sheet for the part
> to see where each function is on the package. This will be very
> non-critical in terms of transistor selected or resistor value. Just
> make sure you use an NPN or N-channel device.
>
tnx :-)
The reason why I believed that a 3.3v '1' would register as a '1' on a CMOS
dsPIC port is that there are quite a few examples on the net that say it
works... That was my mistake, believing what I read on the Internet.
"It will work, but isn't within spec' so it's unreliable. It's reliable at
a few Mhz at very most, when the parts are designed to go upto about 30Mhz."
"dsPIC parts CANNOT be directly interfaced to 3.3v devices!"
Alison
Alison
news:ekaq4c$9bb$1...@news.netins.net...
Hi Yuriy,
..
>
> If your want a working solution, use level translation IC.
> They will work up to 30+MHz and easily available from
> catalog suppliers like Digikey and Mouser.
>
> > dsPIC --------------- SD/MMC
> > CLOCK (5v) ----> CLOCK (3.3v)
> > SPI OUT (5v) ----> DATA IN (3.3v)
> > CHIPSEL (5v) ----> CS (3.3v)
>
> SN74LVC04A @ 3.3Vcc
> Use two inverters in series as a 5V tolerant non-inverting buffer.
>
> SN74LVC3G34 @ 3.3Vcc - three non-inverting buffer.
>
> > SPI IN (5v) <---- DATA OUT (3.3v)
>
> SN74AHCT1G125 @ 5Vcc - 3.3V input levels, 5V output.
>
> --
> WBR, Yuriy.
> "Resistance is futile"
thanks :-) apologies for missing you out.
All of this I'm logging.
Alison
rickman
The DO to SPI IN will only work the buffer is powered from 5 volts or
the output can be pulled up to 5 volts with a resistor. The signals in
the other direction don't need buffers at all, the resistors should
work just fine.
Alison, you have the transistors in your bin, right? They should do
the job fine. Go ahead and try them. If they don't work, then
something else is wrong.
Alison
>
> Alison, you have the transistors in your bin, right? They should do
> the job fine. Go ahead and try them. If they don't work, then
> something else is wrong.
>
Hi Rickman,
Here's the outcome. With the circuit it fails at 7.5Mhz. If the circuit is
bypassed, it fails when switching to 15Mhz.
I've tried it with; two BC547C, two BC548, and two 2N3904.
Checking the circuit on the meter all is fine, it chucks out 5v. It just
seems to be passing out at higher speeds when the circuit is used.
What does that tell us? If the board fails at 15Mhz without the circuit,
and the board fails at 7.5Mhz with the circuit?
The transistors here are good for 100Mhz. They are only 100mA though?
This R&S CP/M logic analyser with a 'storage' scope add-in board thing that
I have here, I'll try to use it tomorrow if I can figure out how to trigger
it, as I don't think I can use an external trigger which I would otherwise
set in software on another pin when switching Mhz to capture what's going
on.
Just wondering why I'm getting faster speeds without the circuit. Oh don't
worry (I'm sure you're not) I'm not criticising at all, very grateful for
the help tbh :-) It should be more reliable with.
Alison
rickman
I am starting to think the voltage issue is a red herring. Where did
you get your code to configure and operate the SPI port on the PIC?
The basic operation of the SPI port has four possible configurations
which differ in the polarity of the clock and the edge that is used to
clock in the data. There actually is no spec on the SPI bus. It was
invented by Motorola (now Freescale but that may have changed again)
when they came out with one of their many MCUs, perhaps the HC11.
If your code was from scratch, then I would suggest that you work on
making sure this is right. If the code is from a reliable source that
has verified the correct configuration in this chip, then I still say
verify it yourself! I'll try a couple of ascii drawings.
Sel ___|---------------------------------
Clk ______|---|___|---|___|---|___|---|__
Data __X=======X=======X=======X=======X=
Sel ___|---------------------------------
Clk __|---|___|---|___|---|___|---|___|--
Data __X=======X=======X=======X=======X=
This will look right if you view it in a fixed width font. You may
need to copy it to a text editor and view it in a font like "Terminal"
in Notepad. The first configuration has data changing on the falling
edge of Clk. The second configuraton is using the rising edge of the
clock to shift the data out. In each case, the data should be read
into the PIC on the opposite edge. This gives you the most setup and
hold time. If you try to sample it on the same edge that shifts out
the data, you will be reading it when it is changing.
The clock can also be inverted in polarity, but that also changes the
edge the data is shifted on so it will be the same problem. You can
try changing the two configuration parameters in the software and see
which ones work best. Then you should verify all this with the scope
when you get it.
So maybe you don't need the voltage buffers anyway. But it would be a
good idea to keep them in as the voltage problem can get worse if the
temperature of the circuit gets extreme one way or the other. Voltage
thresholds are very sensitive to temperature.
Yuriy K.
>> > dsPIC --------------- SD/MMC
>> > CLOCK (5v) ----> CLOCK (3.3v)
>> > SPI OUT (5v) ----> DATA IN (3.3v)
>> > CHIPSEL (5v) ----> CS (3.3v)
>>
>> SN74LVC04A @ 3.3Vcc
>> Use two inverters in series as a 5V tolerant non-inverting buffer.
>>
>> SN74LVC3G34 @ 3.3Vcc - three non-inverting buffer.
>>
>> > SPI IN (5v) <---- DATA OUT (3.3v)
>>
>> SN74AHCT1G125 @ 5Vcc - 3.3V input levels, 5V output.
>
> The DO to SPI IN will only work the buffer is powered from 5 volts or
> the output can be pulled up to 5 volts with a resistor.
Check datasheet for the HCT/AHCT series. Strangely enough, VinH >= 2.0V,
VinL <= 0.8V. Just right for the 3.3V system.
> The signals in
> the other direction don't need buffers at all, the resistors should
> work just fine.
Yeah, right. Especially at 10+ MHz.
> Alison, you have the transistors in your bin, right? They should do
> the job fine. Go ahead and try them. If they don't work, then
> something else is wrong.
If the goal is to solve the problem, use an appropriate components.
In this particular case use IC with voltage translation capability.
If the goal is to entertain yourself, try different combinations of
discrete components. Some of them might even work.
Which way to choose depends on what the *real* goal is.
Yuriy K.
> I am starting to think the voltage issue is a red herring.
> ...
> So maybe you don't need the voltage buffers anyway.
dsPIC I/O port VinH requirement is 0.8*Vcc.
At 5V it gives us VinH >= 4.0V.
It's a little high for 3.3V circuit, isn't it?
Rocky
> I've tried it with; two BC547C, two BC548, and two 2N3904.
>
> Checking the circuit on the meter all is fine, it chucks out 5v. It just
> seems to be passing out at higher speeds when the circuit is used.
>
> What does that tell us? If the board fails at 15Mhz without the circuit,
> and the board fails at 7.5Mhz with the circuit?
>
> The transistors here are good for 100Mhz. They are only 100mA though?
While the transistors may have an ft of 100Mhz their switching response
can be quite poor. You could try one in common base mode. Emitter to DO
of the 3v3, 2k2 from base to 3v3 and the collector to DI of the PIC
with a 1K0 pullup to +5V.
<snip>
> Just wondering why I'm getting faster speeds without the circuit. Oh don't
> worry (I'm sure you're not) I'm not criticising at all, very grateful for
> the help tbh :-) It should be more reliable with.
While VIH is specced at 0.8 * Vsupply the parts with CMOS inputs will
generally switch at about 2.5 volts. The 0.2*VDD for VIL and 0.8*VDD
for VIH are the guaranteed levels.
Regarding your driving the 3v3 inputs from the PIC. The input
capacitance your SPI device could be 'thumb-sucked' at about 20pF. Your
1K8 and 3K3 gives a node impedance of about 1k1 which when combined
with the 20pF gives a delay of about 20nsec. The gap between clock
edges at 15Mhz is only 33nsec. Combined with logic propagation delays
this could easily cause data corruption.
A way to get around this would be to fit a cap of about 33pF across the
1K8 resistor - the idea is the same as used on the 10megohm scope
probe inputs. The cap may have to be bigger or smaller depending on the
actual input capacitance of the device, but I would guess that the 33pF
would probably fix it.
Regards
Rocky
rickman
> rickman wrote:
>
> > I am starting to think the voltage issue is a red herring.
> > ...
> > So maybe you don't need the voltage buffers anyway.
>
> dsPIC I/O port VinH requirement is 0.8*Vcc.
> At 5V it gives us VinH >= 4.0V.
> It's a little high for 3.3V circuit, isn't it?
Haven't you been reading the thread? We discussed that and Alison
added transistor buffers that should have fixed the problem and instead
made it worse. That says to me that although driving from 3.3 may not
be meeting the spec, it is working in her case and she has another
issue.
Alison
Hi Rickman,
It's working :-) I made up a small board of solid copper, and am using a
fixed 2k/1k divider to give 3.33v.
Have a look at this picture to save 1000 words;
http://www.logicsays.com/pub/WeST_pcb.jpg
Not something I'd want to leave on my car seat at an airport!! Most of the
wires are now redundant. The little upright board has a MAX232 on it. Your
transistor circuit is over there on the lower right. The upper right are
those awful dividers from before.
Even the two most troublesome cards I have are working (they're about
3-years old).
What does that tell us in the end? That breadboards are seriously
problematic.
Our DATA OUT signal from the SD card is now directly connected to the SPI-IN
port on the pick.
Alison
Alison
Hey Yuiry!! :-)
I'm going to order a few of those ICs you suggested, as to be honest I like
the right way of doing things. And resistor dividers don't seem to be the
100% reliable tool for the job.
If there's an IC specifically for 3.3v/5v bidirectional comms, then I think
it's good practice to use it.
That dsPIC is now recognising 3.3v as positive '1' at 15Mhz. It had been
spoken of that PICs would work with SD cards directly, yet the datasheets
suggest otherwise. So it's sensible to stay within spec.
This will be a data storage device afterall, so nothing can be left to
chance.
Thanks again :-)
Alison
Jim Thompson
wrote:
>Alison wrote:
>
>> Hi,
>>
>> Please may I ask for assistance? I need a reliable method of interfacing an
>> SPI SD/MMC card to a dsPIC. At the moment I'm using a 1k8/3k3 voltage
>> divider on the 5v ----> 3.3v signals, and connecting the 3.3v ----> 5v
>> signals straight to port.
>>
[snip]
For 3.3V to 5V Logic...
http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
rickman
> Hi Rickman,
>
> It's working :-) I made up a small board of solid copper, and am using a
> fixed 2k/1k divider to give 3.33v.
>
> Have a look at this picture to save 1000 words;
>
> http://www.logicsays.com/pub/WeST_pcb.jpg
>
> Not something I'd want to leave on my car seat at an airport!! Most of the
> wires are now redundant. The little upright board has a MAX232 on it. Your
> transistor circuit is over there on the lower right. The upper right are
> those awful dividers from before.
Yes, it does look a little rough. I don't think many people still use
those push boards just because they can create problem with the speeds
of today's circuits. The stuff we do goes directly to PCB. In fact
the last board I designed had *no* artwork revisions and the first rev
is being shipped to the customer now.
> Even the two most troublesome cards I have are working (they're about
> 3-years old).
>
> What does that tell us in the end? That breadboards are seriously
> problematic.
>
> Our DATA OUT signal from the SD card is now directly connected to the SPI-IN
> port on the pick.
Like you say in your other post, this is clearly not meeting the spec
and so you should consider changing it. However, as others have
pointed out, circuit delays can add up and be a problem at 15 MHz,
especially since the SPI bus is only using half a clock for setup (33
ns). So when you pick a buffer, make sure it is not one of the really
slow HC or HCT buffers. Try to pick one with < 5 ns delay which should
not be a problem at 5 volts. At 3 volts you may see a bit longer
delay, but you should be able to keep it below 10 ns. This should all
be spec'd in the data sheet.
Yuriy K.
> For 3.3V to 5V Logic...
>
> http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
Incredible. Designing complicated circuit instead of simply using
74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
Yuriy K.
> Haven't you been reading the thread? We discussed that and Alison
> added transistor buffers that should have fixed the problem and instead
> made it worse.
This is exactly what expected from *transistor* buffers at this speed. Duh.
Mike Monett
> Have a look at this picture to save 1000 words;
> http://www.logicsays.com/pub/WeST_pcb.jpg
> Not something I'd want to leave on my car seat at an airport!!
Alison,
I hate to tell you this, but that solderless breadboard is about the
worst thing you could be using. With edge rates of 10ns and periods
of 33 ns, you are talking serious ringing and ground bounce. This
kills data integrity regardless of how good the paper schematic
looks. The breadboard will also develop intermittent connections
after a while, so you end up spending all your time chasing random
problems.
Walt Kester, Analog Devices states:
"Matrix board, Vectorboard, wire-wrap, and plug-in breadboard
systems are, without exception, unsuitable for high-performance or
high-frequency analog prototyping. The resistance, inductance, and
capacitance of these breadboards are too high."
He shows some examples of high-frequency prototyping here, but the
photos are too small:
http://www.lpkfusa.com/articles/prototyping/edn_2_96.pdf (198KB)
Here are some examples of "deadbug" and "solder-mount" prototype
circuits:
http://tinyurl.com/y9ljsq (598KB)
Also look for "Manhattan" (and the incorrectly spelled version,
"Manhatten") breadboards.
Terry Ritter has an excellent example at
http://www.ciphersbyritter.com/RADELECT/BREADBD/BREADBD.HTM
I hope this helps. If you need any more information, please ask.
Regards,
Mike Monett
Antiviral, Antibacterial Silver Solution:
http://silversol.freewebpage.org/index.htm
SPICE Analysis of Crystal Oscillators:
http://silversol.freewebpage.org/spice/xtal/clapp.htm
Noise-Rejecting Wideband Sampler:
http://www3.sympatico.ca/add.automation/sampler/intro.htm
Vladimir Vassilevsky
Jim Thompson wrote:
>>>Please may I ask for assistance? I need a reliable method of interfacing an
>>>SPI SD/MMC card to a dsPIC. At the moment I'm using a 1k8/3k3 voltage
>>>divider on the 5v ----> 3.3v signals, and connecting the 3.3v ----> 5v
>>>signals straight to port.
>>>
>
> [snip]
>
> For 3.3V to 5V Logic...
>
> http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
Wow! This is the case when the extra knowledge only harms.
Why didn't you use a simple gate of a standard LS or HCT series?
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
Alison
news:Xns988770837D...@208.49.80.251...
> "Alison" <ali...@logicsaysNOSPAM.com> wrote:
>
> > Have a look at this picture to save 1000 words;
>
> worst thing you could be using. With edge rates of 10ns and periods
>
>
> Regards,
>
> Mike Monett
>
> Antiviral, Antibacterial Silver Solution:
> http://silversol.freewebpage.org/index.htm
> SPICE Analysis of Crystal Oscillators:
> http://silversol.freewebpage.org/spice/xtal/clapp.htm
> Noise-Rejecting Wideband Sampler:
> http://www3.sympatico.ca/add.automation/sampler/intro.htm
Hi Mike,
Thanks for the info. Reading through now.
I'm going to try and get the circuit onto PCB in the next week or so. The
final design will also switchover to TQFP devices. At the moment it just
about serves the purpose of providing a base from which I can develop the
firmware for the chip.
To be honest, I hate breadboard!! But am not in a position to create PCBs.
The closest I can do is 0.1" pitch, printing out the circuit, drilling the
holes through, dalo-ing out the bits I want to keep, and then ferric-ing off
the rest. That's just toooooo messy.
Prototype PCBs here in the UK are still astromonically expensive compared to
the US.
Thanks again,
Alison
Yuriy K.
>> For 3.3V to 5V Logic...
>>
>> http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
>
> Wow! This is the case when the extra knowledge only harms.
> Why didn't you use a simple gate of a standard LS or HCT series?
74LS: VoutH >= 2.4V It is actually worse, than 3.3V CMOS.
Jim Thompson
>Jim Thompson wrote:
>
>> For 3.3V to 5V Logic...
>>
>> http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
>
>Incredible. Designing complicated circuit instead of simply using
>74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
You've just proved yourself an incredible dumb-shit ;-)
You have NO clue what "HCT" actually means. It DOES NOT MEAN that a
+3.3V CMOS input is satisfactory.
There ARE, however, specialty chips made for 3.3V <> 5V logic
translators.
Sheeesh! Another employment candidate for Fry's ;-)
Jim Thompson
You're exhibiting the same ignorance of how IC's work as Yuriy K.
Alison
message news:55hjm25jdlqar1jks...@4ax.com...
> I love to cook with wine. Sometimes I even put it in the food.
Hi Jim,
Nothing wrong with what you've said. It's all stuff I'm reading through so
none of it is wasted :-)
thanks,
Alison
Jim Thompson
Thanks!
These _little_boys_ just get on my nerves chastising me and saying
that HCT would work properly in your application.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
Alison
>
> Thanks!
>
> These _little_boys_ just get on my nerves chastising me and saying
> that HCT would work properly in your application.
>
> ...Jim Thompson
Now, now :-)
Everything everyone has said is valued. It's enabling me to build up a
wider picture of what can be done and what the options are. What I do and
don't do I won't announce though. :-) I'll go with what is reliable with
my own eyes.
The trouble with the net is that since it's so *company* driven, there is
only their view since it's so difficult now to Google search for the old
fashioned diy and educational stuff. If only we could go back 10-years to
when companies laughed at the Internet. Searching was a hell of alot easier
before they came along. Usenet has calmed down alot too, we'd be
threatening to murder each other with a pickaxe by now. (those were the
days).
:-)
Alison
Vladimir Vassilevsky
Jim Thompson wrote:
> On Sun, 26 Nov 2006 09:57:13 -0600, "Yuriy K." <ykt...@mail.ru> wrote:
>
>
>>Jim Thompson wrote:
>>
>>
>>>For 3.3V to 5V Logic...
>>>
>>>http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
>>
>>Incredible. Designing complicated circuit instead of simply using
>>74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
This is exactly correct.
>
> You've just proved yourself an incredible dumb-shit ;-)
Extra knowledge only hurts to the fools.
>
> You have NO clue what "HCT" actually means. It DOES NOT MEAN that a
> +3.3V CMOS input is satisfactory.
RTFM, dude.
It does mean that > 2.0V is guaranteed 1 and < 0.8V is guaranteed 0.
The threshold is normally at 1.4V which is exactly what is required for
3.3V CMOS interfacing.
> There ARE, however, specialty chips made for 3.3V <> 5V logic
> translators.
Oh, you don't say.
> Sheeesh! Another employment candidate for Fry's ;-)
Have the courage to admit the mistake, dear.
Yuriy K.
>>> For 3.3V to 5V Logic...
>>>
>>> http://analog-innovations.com/SED/LogicLevelTranslator74HC14-RevA.pdf
>> Incredible. Designing complicated circuit instead of simply using
>> 74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
>
> You've just proved yourself an incredible dumb-shit ;-)
>
> You have NO clue what "HCT" actually means. It DOES NOT MEAN that a
> +3.3V CMOS input is satisfactory.
Your ignorance is very loud and of highest quality, I must admit.
Not everybody can achieve that level. Have you ever read datasheet, or
any textbook for the EE? "The Art of Electronics" would be a good start.
SN74HCT14 (www.ti.com)
VT+ max 2.1V
VT- min 0.5V
SN74HCT04 (www.ti.com.)
VT+ max 2.1V
VT- min 0.5V
Other manufacturers have similar characteristics.
Typical 3.3V logic:
SN74HC04
VoutH min 3.2V @ 20uA
VoutL max 0.1V @ 20uA
After all these years of design it is finally time to learn the basics. :)
Jim Thompson
<ali...@logicsaysNOSPAM.com> wrote:
>Jim Thompson <To-Email-Use-Th...@My-Web-Site.com> wrote in
>message news:eghjm25ku5mn8oceo...@4ax.com...
>>
>> Thanks!
>>
>> These _little_boys_ just get on my nerves chastising me and saying
>> that HCT would work properly in your application.
>>
>> ...Jim Thompson
>
>Now, now :-)
>
>Everything everyone has said is valued. It's enabling me to build up a
>wider picture of what can be done and what the options are. What I do and
>don't do I won't announce though. :-) I'll go with what is reliable with
>my own eyes.
Just go with a chip designed for the purpose.
>
>The trouble with the net is that since it's so *company* driven, there is
>only their view since it's so difficult now to Google search for the old
>fashioned diy and educational stuff. If only we could go back 10-years to
>when companies laughed at the Internet. Searching was a hell of alot easier
>before they came along. Usenet has calmed down alot too, we'd be
>threatening to murder each other with a pickaxe by now. (those were the
>days).
>
>:-)
>
>Alison
>
Mike Monett
> Hi Mike,
> Thanks for the info. Reading through now.
> I'm going to try and get the circuit onto PCB in the next week or
> so.
> The final design will also switchover to TQFP devices. At the
> moment it just about serves the purpose of providing a base from
> which I can develop the firmware for the chip.
> To be honest, I hate breadboard!! But am not in a position to
> create PCBs. The closest I can do is 0.1" pitch, printing out the
> circuit, drilling the holes through, dalo-ing out the bits I want
> to keep, and then ferric-ing off the rest. That's just toooooo
> messy.
> Prototype PCBs here in the UK are still astromonically expensive
> compared to the US.
> Thanks again,
> Alison
Hi Alison,
Thanks for the reply.
You might find breadboarding a lot more pleasant once you get the
hang of working with copperclad. It certainly makes working with
high frequency a lot easier, and a well-made board can even be used
in place of a pcb. I like to use ordinary hot glue to mount
components to the copper. This works great for parts that stay
cool:)
I'm still using prototypes I made years ago, and they work fine.
Good luck with your circuit!
Jim Thompson
Keep it up. Everybody is realizing the "value" of your consultancy
;-)
You read a data sheet without understanding.
Jim Thompson
Hey fuckhead. I re-designed those parts for ON-Semi.
You are clueless as to good engineering practice.
Vladimir Vassilevsky
Jim Thompson wrote:
>>>>Incredible. Designing complicated circuit instead of simply using
>>>>74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
>>>You've just proved yourself an incredible dumb-shit ;-)
> Keep it up. Everybody is realizing the "value" of your consultancy
> ;-)
>
> You read a data sheet without understanding.
>
> ...Jim Thompson
If you have something meaningful to say, then go ahead and tell us.
Otherwise have the courage to admit that you just made a fool of
yourself, my dear analog desiner.
Yuriy K.
>>>>> For 3.3V to 5V Logic...
>> SN74HCT14 (www.ti.com)
>> VT+ max 2.1V
>> VT- min 0.5V
>>
>> SN74HCT04 (www.ti.com.)
Correction:
ViH min 2.0V
ViL max 0.8V
>> Typical 3.3V logic:
>> SN74HC04
>> VoutH min 3.2V @ 20uA
>> VoutL max 0.1V @ 20uA
> Hey fuckhead. I re-designed those parts for ON-Semi.
> You are clueless as to good engineering practice.
A lot of noise, no information whatsoever.
It is a sign of weakness and I forgive you.
Be at peace with yourself.
Jim Thompson
Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
Jim Thompson
And piece be with you also... GFY ;-)
Fred Bartoli
> On Sun, 26 Nov 2006 18:29:28 GMT, Vladimir Vassilevsky
> <antispa...@hotmail.com> wrote:
>
>>
>> Jim Thompson wrote:
>>
>>>>>> Incredible. Designing complicated circuit instead of simply using
>>>>>> 74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
>>>>> You've just proved yourself an incredible dumb-shit ;-)
>>> Keep it up. Everybody is realizing the "value" of your consultancy
>>> ;-)
>>>
>>> You read a data sheet without understanding.
>>>
>>> ...Jim Thompson
>>
>>
>> If you have something meaningful to say, then go ahead and tell us.
>> Otherwise have the courage to admit that you just made a fool of
>> yourself, my dear analog desiner.
>>
>>
>> Vladimir Vassilevsky
>>
>> DSP and Mixed Signal Design Consultant
>>
>> http://www.abvolt.com
>
> Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
>
Well, you can't expect a digital guy to know that.
Hmmm, gave me an idea :-)
--
Thanks,
Fred.
Vladimir Vassilevsky
Jim Thompson wrote:
>>>>>>Incredible. Designing complicated circuit instead of simply using
>>>>>>74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
>>>>>You've just proved yourself an incredible dumb-shit ;-)
>>>
>>>Keep it up. Everybody is realizing the "value" of your consultancy
>>>;-)
>>>
>>>You read a data sheet without understanding.
>>>
>>> ...Jim Thompson
>>
>>
>>
>>If you have something meaningful to say, then go ahead and tell us.
>>Otherwise have the courage to admit that you just made a fool of
>>yourself, my dear analog desiner.
>>
>>
>
> Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
>
Nothing happens. The 2.4V reads as a clear 1, the threshold is at 1.4V
+/- hysteresis of 100mV, the propagation delay is about 5ns/10ns
fall/raise accordingly. The current consumption at 2.4Vin/5Vdd is 1mA
which is perfectly within the allowed limits.
Jim , you goofed up and I suggest you to bring your apologies.
Jim Thompson
Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
flow is NOT good engineering practice, and it's NEVER done in
well-designed ASIC's.
To see how a 3.3V Logic Level to 5V Logic Level Translator is done
properly (in ASIC's designed specifically for that purpose), see...
http://analog-innovations.com/SED/LogicLevelTranslator.pdf
Dimensions are "pre-shrink" BTW, as if you'd know what that means ;-)
I used a similar scheme in my USB interface work for Intel.
Unfortunately the patents don't show that part, since it's old art.
Expect my apologies about the time Russia actually becomes a Democracy
and Iran becomes Jewish ;-)
Jim Thompson
<To-Email-Use-Th...@My-Web-Site.com> wrote:
[snip]
>
>Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
>flow is NOT good engineering practice, and it's NEVER done in
>well-designed ASIC's.
>
>To see how a 3.3V Logic Level to 5V Logic Level Translator is done
>properly (in ASIC's designed specifically for that purpose), see...
>
>http://analog-innovations.com/SED/LogicLevelTranslator.pdf
>
[snip]
Also: Static current for this structure is zero, except for nA's of
leakage.
Rene Tschaggelar
> On Sun, 26 Nov 2006 20:14:36 GMT, Vladimir Vassilevsky
> <antispa...@hotmail.com> wrote:
>
> Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
> flow is NOT good engineering practice, and it's NEVER done in
> well-designed ASIC's.
>
> To see how a 3.3V Logic Level to 5V Logic Level Translator is done
> properly (in ASIC's designed specifically for that purpose), see...
>
> http://analog-innovations.com/SED/LogicLevelTranslator.pdf
Jim,
your schematic is lacking the power details.
How are the HC04 powered ? +3.3V or +5V ?
Rene
--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
Jim Thompson
wrote:
>Jim Thompson wrote:
>> On Sun, 26 Nov 2006 20:14:36 GMT, Vladimir Vassilevsky
>> <antispa...@hotmail.com> wrote:
>>
>[snip]
>
>> Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
>> flow is NOT good engineering practice, and it's NEVER done in
>> well-designed ASIC's.
>>
>> To see how a 3.3V Logic Level to 5V Logic Level Translator is done
>> properly (in ASIC's designed specifically for that purpose), see...
>>
>> http://analog-innovations.com/SED/LogicLevelTranslator.pdf
>
>Jim,
>your schematic is lacking the power details.
>How are the HC04 powered ? +3.3V or +5V ?
>
>Rene
From InverterVDD... Those PSpice-provided inverter symbols utilize
"hidden" power pins.
In the USB ASIC there weren't actually full 74HC04 equivalents, just
single-stage min-geometry inverters... going on into the ASIC... i.e.
no heavy loading.
Yuriy K.
>>>> If you have something meaningful to say, then go ahead and tell us.
>>>> Otherwise have the courage to admit that you just made a fool of
>>>> yourself, my dear analog desiner.
>>>>
>>> Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
>>>
>>
>> Nothing happens. The 2.4V reads as a clear 1, the threshold is at 1.4V
>> +/- hysteresis of 100mV, the propagation delay is about 5ns/10ns
>> fall/raise accordingly. The current consumption at 2.4Vin/5Vdd is 1mA
>> which is perfectly within the allowed limits.
>>
>> Jim , you goofed up and I suggest you to bring your apologies.
>
> Allowing a static (and *undefined* BTW... 1mA if you're lucky)
RTFM.
http://focus.ti.com/docs/prod/folders/print/sn74hct04.html
http://www.ti.com/lit/gpn/sn74hct04
...
page 3.
electrical characteristics over recommended operating free-air
temperature range
ΔICC(*), One input at 0.5 V or 2.4 V, Other inputs at 0 or VCC,
2.9mA *max*.
(*) This is the increase in supply current for each input that is at one
of the specified TTL voltage levels, rather than 0 V or VCC.
> I used a similar scheme in my USB interface work for Intel.
Irrelevant. There was a very specific problem, and HCT/AHCT is a correct
solution.
> Expect my apologies about the time Russia actually becomes a Democracy
> and Iran becomes Jewish ;-)
Very few people can accept their own mistakes, unfortunately.
Life would be much better otherwise.
Mike Monett
> Jim Thompson wrote:
[...]
>> Allowing a static (and *undefined* BTW. 1mA if you're lucky)
> RTFM.
> http://www.ti.com/lit/gpn/sn74hct04
> page 3.
> electrical characteristics over recommended operating free-air
> temperature range
> 祢CC(*), One input at 0.5 V or 2.4 V, Other inputs at 0 or VCC,
> 2.9mA *max*.
> (*) This is the increase in supply current for each input that is
> at one of the specified TTL voltage levels, rather than 0 V or
> VCC.
>> I used a similar scheme in my USB interface work for Intel.
> Irrelevant. There was a very specific problem, and HCT/AHCT is a
> correct solution.
Yuriy,
You are correct. Here's more supporting documentation.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
AHC/AHCT Designer's Guide
September 1998, revised February 2000
Starting on page 19:
To process signals having a swing of only about 3 V in a system with
a supply voltage of 5 V, the TTL-compatible SN74AHCT14 Schmitt
trigger is available. This device has the same switching
characteristics as the previously described Schmitt trigger, except
that appropriate circuitry shifts the switching thresholds into the
region of the commonly used TTL-voltage levels. Figure 5 shows the
transfer function of such components.
http://focus.ti.com/lit/ml/scla013d/scla013d.pdf
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SN54/74HCT
CMOS Logic Family
Applications and Restrictions
Power Consumption of HCT Circuits
The threshold voltage of a CMOS circuit is determined by the
geometry of the input transistors. These transistors are designed to
sink the same input current at the required threshold voltage. The
resulting voltage at the output is equivalent to 50% of the supply
voltage VCC. For an HC circuit, the channel width of the p-channel
transistor of the input is approximately twice the value of an
n-channel transistor. The purpose is to make both transistors have
the same current characteristics, thus making the threshold voltage
of their input at about 50% of the supply voltage VCC. This circuit
area has been modified for HCT devices: the n-channel transistor is
about seven times wider than the p-channel transistor (see Figure
6). This shifts the threshold voltage in a way that it amounts to
30% of the supply voltage. At a supply voltage VCC = 5 V, the
threshold voltage is VT = 1.5 V, similar to the threshold voltage of
TTL circuits.
Figure 6. Input-Stage Structure of HC and HCT Circuits
Figure 7. Supply Current as a Function of the Input Voltage
Figure 8. Current Consumption as a Function of Frequency
For frequencies above 5 MHz, this effect is of secondary importance,
since current consumption is then determined primarily by the power
required for reversing the charge of the load capacitance. Moreover,
the increase of current consumption for devices driven by TTL levels
is much lower in practice because TTL circuits supply a typical
voltage swing that is significantly higher than the data sheet value
used for the measurement in Figure 8.
http://focus.ti.com/lit/an/scla011/scla011.pdf
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Yuriy K.
http://www-s.ti.com/sc/psheets/scea035a/scea035a.pdf
is a explanation of the different logic level voltage translation
methods and ICs.
Chris Jones
I think that in the non-ASIC world where adding extra transistors is not
free, it is less frowned-upon to allow CMOS logic to draw continuous supply
current. I don't know of any chips failing due to doing this, with the
exception of 74AC series when running from 5V and biased at the threshold,
which really does draw a lot of current.
OnSemi do in fact recommend the use of HCT14 devices to receive signals from
LSTTL chips (see for yourself.... perhaps their marketing dept needs
re-education):
http://www.onsemi.com/PowerSolutions/product.do?id=MC74HCT14ADT
The datasheet "Recommended Operating Conditions" explicitly specifies that
there is no minimum input slew rate, and the supply current with one input
held at 2.4V is specified as 2.4mA (typ), implying that it is at least an
allowable operating condition. Certainly 2.4mA is far below the specified
maximum IDD for the part.
It seems to me that the HCT14 will work, and not fail prematurely, when one
inverter is driven by a 3.3V input signal. Perhaps you know better, and if
so I'd like to hear about it.
I think your circuit with no steady state current consumption would be ideal
if one were designing an ASIC, but the intended application is not battery
powered, and the HCT parts are cheap, available from several sources, less
likely to be discontinued than an exotic level shifter IC, and result in
lower component count than using an additional CD4007 (which would probably
be too slow anyway when it's required to go to 15MHz). BTW why is the
simulated waveform from your CD4007 circuit so fast? Perhaps you don't
have PCB parasitics in your simulation. Most manufacturers of 4007 parts
seem to specify about 60 - 75ns maximum propagation delay at 5V VDD. I
wonder if anyone makes a CD4007 type thing in a more modern process.
Chris
Jim Thompson
[snip]
>
> Figure 7. Supply Current as a Function of the Input Voltage
>
[snip]
>
> http://focus.ti.com/lit/an/scla011/scla011.pdf
>
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Regards,
>
> Mike Monett
>
If you're comfortable with that "overlap" current, go right ahead.
I still consider it bad engineering practice but, then again, I'm
presently designing a chip (analog, but LOTS of logic) with a total
average power consumption specification of 6uA. Overlaps like that
would kill the consumption.
I do note that the TI app-note does recommend the Schmitt. But it
depends on the Schmitt design whether you still have the overlap
current or not.
If 'HCT04 were a good general solution to 3.3V to 5V translators,
wonder why they make true translator chips like the Maxim MX3xxxx to
name just one? For their health? I doubt it.
Alison
news:1164556090.1...@n67g2000cwd.googlegroups.com...
> Yes, it does look a little rough. I don't think many people still use
> those push boards just because they can create problem with the speeds
> of today's circuits. The stuff we do goes directly to PCB. In fact
> the last board I designed had *no* artwork revisions and the first rev
> is being shipped to the customer now.
>
>
Hi Rickman,
It's looking alot tidier now. Should keep me going with the firmware
development until the PCBs appear.
http://www.logicsays.com/pub/WeST/WeST_v2.jpg
The board with the chip on it has most of what's required SPI side condensed
down. There's a board under that takes care of getting the Vdd/Vss to the
all of the pins (PICs are picky about that). And the ribbon cable goes off
to a kind of hybrid SCSI bus implemented on a 68000 processor DMA bus.
Thanks again for your help :-) Thanks to all of you :-)
Alison
Vladimir Vassilevsky
Jim Thompson wrote:
>>Jim Thompson wrote:
>>
>>
>>>>>>>>Incredible. Designing complicated circuit instead of simply using
>>>>>>>>74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
>>>>>>>You've just proved yourself an incredible dumb-shit ;-)
>>>>>Keep it up. Everybody is realizing the "value" of your consultancy
>>>>>;-)
>>>>>
>>>>>You read a data sheet without understanding.
>>>>>
>>>>> ...Jim Thompson
>>>>
>>>>
>>>>
>>>>If you have something meaningful to say, then go ahead and tell us.
>>>>Otherwise have the courage to admit that you just made a fool of
>>>>yourself, my dear analog desiner.
>>>
>>>Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
>>>
>>
>>
>>Nothing happens. The 2.4V reads as a clear 1, the threshold is at 1.4V
>>+/- hysteresis of 100mV, the propagation delay is about 5ns/10ns
>>fall/raise accordingly. The current consumption at 2.4Vin/5Vdd is 1mA
>>which is perfectly within the allowed limits.
>>
> Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
> flow is NOT good engineering practice, and it's NEVER done in
> well-designed ASIC's.
Will you cut down the bullshit about ASICs, USB and nanoamperes. We are
talking about interfacing the 3.3V CMOS input level from a flash card to
5V level input of a dsPIC. It is perfectly done with a simple 74HCT
gate, and this solution you can find in any ABC book on electronics.
BTW, where did you get the 2.4V? JFYI: for 3.3V CMOS level and 5Vdd, the
consumption is just 0.3mA. This is a perfectly documented mode of the
operation, RTFM.
>
> To see how a 3.3V Logic Level to 5V Logic Level Translator is done
> properly (in ASIC's designed specifically for that purpose), see...
>
> http://analog-innovations.com/SED/LogicLevelTranslator.pdf
>
> Dimensions are "pre-shrink" BTW, as if you'd know what that means ;-)
I don't care. It is absolutely irrelevant.
> I used a similar scheme in my USB interface work for Intel.
> Unfortunately the patents don't show that part, since it's old art.
You see, grandpa, what you are doing is too old fashioned.
> Expect my apologies about the time Russia actually becomes a Democracy
There is no such thing as Russia. There was, there is and there will
always be the USSR. Unfortunately.
> and Iran becomes Jewish ;-)
Very well could be. The jews of Israel are actually changing to
arab-like nation.
PeteS
If you run into problems, then as I live near Cambridge (work near
there too), I might be willing to help you out - think of it as a xmas
gift or whatever.
Cheers
PeteS
Jim Thompson
There is no way to argue with a punk. Don't go away mad, just go
away.
When your accumulated income exceeds $5 million, *perhaps* I'll deign
to listen to you ;-)
jasen
> rickman <gnu...@gmail.com> wrote in message
>>
>> The drawing from my other post did not inititially include the BCE
>> markings, so I added them. You can check the data sheet for the part
>> to see where each function is on the package. This will be very
>> non-critical in terms of transistor selected or resistor value. Just
>> make sure you use an NPN or N-channel device.
>>
>
> tnx :-)
>
> The reason why I believed that a 3.3v '1' would register as a '1' on a CMOS
> dsPIC port is that there are quite a few examples on the net that say it
> works... That was my mistake, believing what I read on the Internet.
isn't High typically specced as anything above 2/3 VCC.... (that'd be 3.33v)
What voltage are they running the DSPIC ?
> "It will work, but isn't within spec' so it's unreliable. It's reliable at
> a few Mhz at very most, when the parts are designed to go upto about 30Mhz."
>
> "dsPIC parts CANNOT be directly interfaced to 3.3v devices!"
if you power the PIC from 3.3V it'll probably work just fine
--
Bye.
Jasen
Jim Granville
> It's looking alot tidier now. Should keep me going with the firmware
> development until the PCBs appear.
>
> http://www.logicsays.com/pub/WeST/WeST_v2.jpg
>
> The board with the chip on it has most of what's required SPI side condensed
> down. There's a board under that takes care of getting the Vdd/Vss to the
> all of the pins (PICs are picky about that). And the ribbon cable goes off
> to a kind of hybrid SCSI bus implemented on a 68000 processor DMA bus.
>
> Thanks again for your help :-) Thanks to all of you :-)
To give yourself some more margin, look at adding some parallel C to
the series resistor (same peaking/matching princple as a scope probe),
on those lines that need to do 5V to 3V.
What you are making is a capacitive divider (high frequency) that
matches the resistive divider (low frequency), and it allows the
resistor values to increase without a speed penalty (for lower power).
eg If the total load shunt C is 20pF, you'll need appx 40pF.
Avoid transistors, they will be too slow.
-jg
Jim Granville
> On Sun, 26 Nov 2006 13:42:53 -0700, Jim Thompson
> <To-Email-Use-Th...@My-Web-Site.com> wrote:
>
> [snip]
>
>>Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
>>flow is NOT good engineering practice, and it's NEVER done in
>>well-designed ASIC's.
>>
>>To see how a 3.3V Logic Level to 5V Logic Level Translator is done
>>properly (in ASIC's designed specifically for that purpose), see...
>>
>>http://analog-innovations.com/SED/LogicLevelTranslator.pdf
>>
>
> [snip]
>
> Also: Static current for this structure is zero, except for nA's of
> leakage.
.. When driven to the rails ?
Interesting circuit; do you have the plots of Icc vs Vin,
increasing and decreasing ?
And also Icc into/out of 5V and 3.3V rails ?
Limits of Vcc delta's ?
-jg
rickman
> Mike Monett <N...@email.adr> wrote in message
> news:Xns988770837D...@208.49.80.251...
> > "Alison" <ali...@logicsaysNOSPAM.com> wrote:
> >
> > > Have a look at this picture to save 1000 words;
> >
> > I hate to tell you this, but that solderless breadboard is about the
> > worst thing you could be using. With edge rates of 10ns and periods
> >
> > I hope this helps. If you need any more information, please ask.
> >
> > Regards,
> >
> > Mike Monett
> >
> > Antiviral, Antibacterial Silver Solution:
> > http://silversol.freewebpage.org/index.htm
> > SPICE Analysis of Crystal Oscillators:
> > http://silversol.freewebpage.org/spice/xtal/clapp.htm
> > Noise-Rejecting Wideband Sampler:
> > http://www3.sympatico.ca/add.automation/sampler/intro.htm
>
>
>
> Thanks for the info. Reading through now.
>
> I'm going to try and get the circuit onto PCB in the next week or so. The
> final design will also switchover to TQFP devices. At the moment it just
> about serves the purpose of providing a base from which I can develop the
> firmware for the chip.
>
> To be honest, I hate breadboard!! But am not in a position to create PCBs.
> The closest I can do is 0.1" pitch, printing out the circuit, drilling the
> holes through, dalo-ing out the bits I want to keep, and then ferric-ing off
> the rest. That's just toooooo messy.
>
> Prototype PCBs here in the UK are still astromonically expensive compared to
> the US.
There are a few other things you might want to consider. I don't know
how many of these you plan to make or how they will be used. But
anytime you have external signals, it is a good idea to protect them
from ESD. If you can work with a real PCB design (made by a PCB
maker), you can use a part that might be better. Here is one I found
at TI.
http://focus.ti.com/docs/prod/folders/print/txb0104.html
It provides 15 kV ESD protection and will do the level translation
without the resistors and messy circuitry. It does not come in a 0.1"
DIP, but it is available in SOIC which is 0.05" pin spacing, large by
today's standards. You should be able to get a few as free samples.
All things considered, something like this is the route I would take.
I don't know how SD card I/Os are typically protected, but this is
something you might want to take seriously.
If you want to have a PCB made for you inexpensively you can go to
Olimex which I think is in Eastern Europe. http://olimex.com/ Olimex
will directly accept Eagle .BRD files without conversion to Gerber
format, but I find Eagle a bit of a PITA to learn. FreePCB is a lot
more user friendly. You can find it at http://www.freepcb.com/ with
support available in the online forum or at
http://tech.groups.yahoo.com/group/FreePCB/ I hope it catches on more
widely.
Oh, be sure to use lots of power and ground plane area, flood fill if
you go two sided. This provides a good high frequency capacitor that
minimizes noise on the power planes.
Let us know how your design works out!
rickman
> Hi Alison,
>
> Thanks for the reply.
>
> You might find breadboarding a lot more pleasant once you get the
> hang of working with copperclad. It certainly makes working with
> high frequency a lot easier, and a well-made board can even be used
> in place of a pcb. I like to use ordinary hot glue to mount
> components to the copper. This works great for parts that stay
> cool:)
>
> I'm still using prototypes I made years ago, and they work fine.
Maybe I don't undestand what you mean by "copperclad". To me that is
the same as PCB. Are you talking about mouting components to a
pre-etched general prototype board or a PCB that has *not* been etched
at all, or something else?
Jim Thompson
<no....@designtools.maps.co.nz> wrote:
>Jim Thompson wrote:
>
>> On Sun, 26 Nov 2006 13:42:53 -0700, Jim Thompson
>> <To-Email-Use-Th...@My-Web-Site.com> wrote:
>>
>> [snip]
>>
>>>Allowing a static (and *undefined* BTW... 1mA if you're lucky) current
>>>flow is NOT good engineering practice, and it's NEVER done in
>>>well-designed ASIC's.
>>>
>>>To see how a 3.3V Logic Level to 5V Logic Level Translator is done
>>>properly (in ASIC's designed specifically for that purpose), see...
>>>
>>>http://analog-innovations.com/SED/LogicLevelTranslator.pdf
>>>
>>
>> [snip]
>>
>> Also: Static current for this structure is zero, except for nA's of
>> leakage.
>
>.. When driven to the rails ?
Not quite to rails.
>
>Interesting circuit; do you have the plots of Icc vs Vin,
>increasing and decreasing ?
See (updated)....
http://analog-innovations.com/SED/LogicTranslatorConcept.pdf
>And also Icc into/out of 5V and 3.3V rails ?
V1 = 5V, V2 = 3.3V
>
>Limits of Vcc delta's ?
>
>-jg
I don't know an answer for that. This presentation was just a
lash-up. My actual ASIC implementation uses single-stage inverters
instead of the 74HC04's, so my sizing ability allows very low
overlaps... it's basically a form of hysteresis.
I'd guess that wildly disparate power supplies would present some slew
issues and give more overlap current... but I'd hazard a guess that
1.2V -> 5V would be easy.
lang...@ieee.org
Jim Thompson wrote:
> On Sun, 26 Nov 2006 18:29:28 GMT, Vladimir Vassilevsky
> <antispa...@hotmail.com> wrote:
>
> >
> >
> >Jim Thompson wrote:
> >
> >>>>>Incredible. Designing complicated circuit instead of simply using
> >>>>>74HCT14 / 74HCT04 / zillion other HCT74xx and AHCTxx ICs.
> >
> >>>>You've just proved yourself an incredible dumb-shit ;-)
> > > Keep it up. Everybody is realizing the "value" of your consultancy
> > > ;-)
> > >
> > > You read a data sheet without understanding.
> > >
> > > ...Jim Thompson
> >
> >
> >
> >If you have something meaningful to say, then go ahead and tell us.
> >Otherwise have the courage to admit that you just made a fool of
> >yourself, my dear analog desiner.
> >
> >
> >Vladimir Vassilevsky
> >
> >DSP and Mixed Signal Design Consultant
> >
> >http://www.abvolt.com
>
> Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
>
> ...Jim Thompson
Maybe I'm dense but isn't that that pretty much the intended
application for HCT parts?
specified in the datasheet down to much extra current consumption when
going to limits
of Vi and Vcc
-Lasse
Jim Thompson
>
>Jim Thompson wrote:
[snip]
>>
>> Apply +2.4V Input to an HCTxx running on VDD = +5V and what happens?
>>
>> ...Jim Thompson
>
>Maybe I'm dense but isn't that that pretty much the intended
>application for HCT parts?
>specified in the datasheet down to much extra current consumption when
>going to limits
>of Vi and Vcc
>
>-Lasse
"HCT" parts were designed to receive signals from TTL parts also
operating at VDD=5V.
The shifted threshold was done to minimize timing skew when making the
translation.
Over time they've come to be misused as logic level translators, even
though there are specific parts for such purposes.
Unfortunately many lurkers here presume that "getting away with it" is
good engineering practice :-(
Me, I have to deliver good stuff every time... otherwise I'm
unemployed.
lang...@ieee.org
>
> Alison
look at olimex.com they are pretty cheap, 160x100mm two layer pcb with
solderstop
and silk for something like 33$
-Lasse
John B
.
.
.
> Prototype PCBs here in the UK are still astromonically expensive
> compared to the US.
>
> Thanks again,
>
> Alison
Not at all. Have a look here:
and go to the 'Plot & Go' service. They'll do one-off prototypes very
cheap and good quality too.
--
John B
Yuriy K.
> On Sun, 26 Nov 2006 18:00:38 -0500, Mike Monett <N...@email.adr> wrote:
>
> [snip]
>> Figure 7. Supply Current as a Function of the Input Voltage
>>
> [snip]
>> http://focus.ti.com/lit/an/scla011/scla011.pdf
> If 'HCT04 were a good general solution to 3.3V to 5V translators,
> wonder why they make true translator chips like the Maxim MX3xxxx to
> name just one? For their health? I doubt it.
RTFM and think. Give it a try.
HCT/AHCT is good only for unidirectional 3.3V->5V translation. In this
case it is the most convenient and least expensive solution.
Specialized IC can be used for bidirectional level translation, when
different voltage levels required, like 1.8 <-> 3.3V, etc.
Mike Monett
> Maybe I don't undestand what you mean by "copperclad". To me that is
> the same as PCB. Are you talking about mouting components to a
> pre-etched general prototype board or a PCB that has *not* been etched
> at all, or something else?
Bare copper on fr4. You can usually get scraps from any pcb house for free.
Only one side needs copper. You can cut it with a knife, hacksaw or tin
snips to the required size.
There are many ways of mounting the components. I use plain hot glue most
of the time, but also screw components such as heatsinks to the board if
needed. You can cut the plane to isolate components if needed.
See Terry Ritter's page for an example of Manhattan style:
http://www.ciphersbyritter.com/RADELECT/BREADBD/BREADBD.HTM
Since the copper is not cut or etched, it makes a much better ground plane
than a pcb, and you can get excellent analog and digital performance up to
about 1GHz. However, fast risetimes do not do well with copper wire
interconnections. For example, the Motorola EclInPs with 160ps risetime is
a problem. You really need stripline or microstrip to handle these signals.
A big advantage is you can easily move parts around if needed to add new
circuitry. But complex circuits with a wide data buss would be difficult
to wire.
After a few days, you will see your fingerprints etched into the surface.
The copper may eventually darken due to corrosion. Brasso may clean the
oxides off, but I'd rinse the board carefully to remove any trace of acids.
The technique is ideal for testing new components or circuit concepts.
People have made entire high-performance radio receivers using this method.
Each circuit sits in its own shielded box for good isolation. When you want
to try a different mixer or amplifier, it's easy to pop a new board in and
test it under actual conditions.
jet...@hotmail.com
> > The reason why I believed that a 3.3v '1' would register as a '1' on a CMOS
> > dsPIC port is that there are quite a few examples on the net that say it
> > works... That was my mistake, believing what I read on the Internet.
>
> isn't High typically specced as anything above 2/3 VCC.... (that'd be 3.33v)
Three things:
a) Vih is typically 0.7*VCC (that'd be 3.5V). Minor difference, but
see..
b) A 3.3V <> 5V circuit contains two power supplies, each with its own
tolerance. If 5V goes +5% (5.25V) and 3.3V goes -5% (3.135V) at the
same time, the situation gets worse. Vih is now 0.7*5.25V = 3.675V,
while the 3.3V sender can generate 3.135V max.
c) You're missing that a 1 generated by a 3.3V device is not 3.3V.
It's Voh. Typically CMOS outputs tend to climb up to almost VCC, but
not all do. And certainly some devices trade lower Voh for a faster
timing spec (ie faster device without silicon change).
A fool who thinks that this might be related to the timing problems of
the GP... ?!
Regards,
Marc
rickman
> "HCT" parts were designed to receive signals from TTL parts also
> operating at VDD=5V.
>
> The shifted threshold was done to minimize timing skew when making the
> translation.
>
> Over time they've come to be misused as logic level translators, even
> though there are specific parts for such purposes.
>
> Unfortunately many lurkers here presume that "getting away with it" is
> good engineering practice :-(
>
> Me, I have to deliver good stuff every time... otherwise I'm
> unemployed.
I understand what you are saying, but your first few posts were not at
all clear and only appeared to be attacks on others. I am not trying
to place any blame for this flame war, as there is plenty of blame to
go around. I would suggest that you might consider how your posts
appear to a third party reading this. Take it from someone who knows,
this is not the best way to promote yourself.
BTW, sort of like in the movie Chinatown, "Let it go Jack, it's just
the Internet!"
rickman
> "rickman" <gnu...@gmail.com> wrote:
>
> > Maybe I don't undestand what you mean by "copperclad". To me that is
> > the same as PCB. Are you talking about mouting components to a
> > pre-etched general prototype board or a PCB that has *not* been etched
> > at all, or something else?
>
> Bare copper on fr4. You can usually get scraps from any pcb house for free.
> Only one side needs copper. You can cut it with a knife, hacksaw or tin
> snips to the required size.
Ok, this is not addressing my question. I know what copperclad is. I
don't understand how you are using it.
> There are many ways of mounting the components. I use plain hot glue most
> of the time, but also screw components such as heatsinks to the board if
> needed. You can cut the plane to isolate components if needed.
Are you saying that you are just using the board as a mechanical mount
and not to make connections? How do you make connections with point to
point wires?
> See Terry Ritter's page for an example of Manhattan style:
>
> http://www.ciphersbyritter.com/RADELECT/BREADBD/BREADBD.HTM
Ok, I guess this is a bit more clear.
> Since the copper is not cut or etched, it makes a much better ground plane
> than a pcb, and you can get excellent analog and digital performance up to
> about 1GHz. However, fast risetimes do not do well with copper wire
> interconnections. For example, the Motorola EclInPs with 160ps risetime is
> a problem. You really need stripline or microstrip to handle these signals.
>
> A big advantage is you can easily move parts around if needed to add new
> circuitry. But complex circuits with a wide data buss would be difficult
> to wire.
>
> After a few days, you will see your fingerprints etched into the surface.
> The copper may eventually darken due to corrosion. Brasso may clean the
> oxides off, but I'd rinse the board carefully to remove any trace of acids.
>
> The technique is ideal for testing new components or circuit concepts.
> People have made entire high-performance radio receivers using this method.
> Each circuit sits in its own shielded box for good isolation. When you want
> to try a different mixer or amplifier, it's easy to pop a new board in and
> test it under actual conditions.
This seems very difficult to me, but I do digital much more than analog
and the number of connections with multi-pin packages is much higher.
Jim Thompson
One of my favorite movies... in my DVD collection ;-)
You're right, I should ignore the flack.
Vladimir Vassilevsky
rickman wrote:
>
> I understand what you are saying, but your first few posts were not at
> all clear and only appeared to be attacks on others.
I have to admit that I didn't expect the cross conduction to be that
high in the HCT at 3.3V input levels. Actually it made me rethink my
position. The HCTs can be used as 3.3V -> 5V level translators, however
the user must be aware of the power consumption.
BTW, the maximum of cross conduction appears to be at 0.9V input (5Vdd),
and it is about 4mA.
VLV
Jim Thompson
Theoretically it should be maximum at the design center of the TTL
threshold, ~1.4V.
Maybe the 0.9V you measure is just process skew?
Jim Granville
It's generally quite poorly documented, and varies across vendors,
and Logic families. The Schmitt devices tend to have lower peaks than
non schmitt devices.
Seems to be an after-thought to most digital designers....
-jg