Interfacing 3.3V SPI devices to a 5V MCU

[Simon Clubley]

I'm about to do some work with interfacing 3.3V SPI based devices to
5V MCUs and unlike the devices I've been used to, these particular
3.3V SPI devices are _not_ 5V tolerant.

Interfacing the SPI output lines from the MCU to the SPI device is easy;
just use a level shifter on those lines.

In addition, you can just connect the MISO SPI device output line directly
into the MCU and it _should_ safely work ok.

However, connecting MISO directly makes me nervous in case of coding errors
which result in the MISO line been driven as a output by the MCU.

I'm thinking of using a zener diode plus resistor on the MISO line as I
don't want to use a full level shifter IC to just protect this one line.
(These are not bi-directional level shifters so I would have to use a
second level shifter.)

Before I try it, I thought I would ask what do you do to protect the MISO
line in this case or am I just been paranoid ? :-)

(I suspect the latter, but when I write code, I like to protect against
mistakes and it's no different with hardware (even hobbyist hardware
like this project)).

Thanks,

Simon.

PS: I'm implictly assuming the SPI device would survive it's MISO line
been driven by the MCU if the voltage was 3.3V. Do you know of any devices
for which this is not the case ?

--
Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP
Microsoft: Bringing you 1980s technology to a 21st century world

[Simon Clubley]

On 2013-02-07, Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:
>
> However, connecting MISO directly makes me nervous in case of coding errors
> which result in the MISO line been driven as a output by the MCU.
>
> I'm thinking of using a zener diode plus resistor on the MISO line as I
> don't want to use a full level shifter IC to just protect this one line.
> (These are not bi-directional level shifters so I would have to use a
> second level shifter.)
>

BTW, I forgot to mention the reason why I am not just using the obvious
solution of a inline diode (even a Schottky one) is because I am concerned
about the additional voltage drop, especially if MISO is not been driven at
near 3.3V to begin with.

Simon.

[hamilton]

On 2/7/2013 7:24 AM, Simon Clubley wrote:
> On 2013-02-07, Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:
>>
>> However, connecting MISO directly makes me nervous in case of coding errors
>> which result in the MISO line been driven as a output by the MCU.
>>
>> I'm thinking of using a zener diode plus resistor on the MISO line as I
>> don't want to use a full level shifter IC to just protect this one line.
>> (These are not bi-directional level shifters so I would have to use a
>> second level shifter.)
>>
>
> BTW, I forgot to mention the reason why I am not just using the obvious
> solution of a inline diode (even a Schottky one) is because I am concerned
> about the additional voltage drop, especially if MISO is not been driven at
> near 3.3V to begin with.
>
> Simon.
>

Has been done many times:

https://www.sparkfun.com/products/8745?

Schematic is there also:

http://www.sparkfun.com/datasheets/BreakoutBoards/Level-Converter-v10.pdf

But if you want to spend money:

http://www.analog.com/en/interface-isolation/level-translators/products/index.html

[Rob Gaddi]

How about just a series resistor? Say you're cranking the SPI at 20
MHz, and the MISO pin represents 5pF when acting properly as an input.
A 1K resistor gives you a 90% risetime of only 10 ns out of your 50, and
limits the current into the device's ESD clamp to under 1.5 mA.

--
Rob Gaddi, Highland Technology -- www.highlandtechnology.com
Email address domain is currently out of order. See above to fix.

[Simon Clubley]

On 2013-02-07, Rob Gaddi <rga...@technologyhighland.invalid> wrote:
> On Thu, 7 Feb 2013 14:24:27 +0000 (UTC)
> Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:
>
>> On 2013-02-07, Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:
>> >
>> > However, connecting MISO directly makes me nervous in case of coding errors
>> > which result in the MISO line been driven as a output by the MCU.
>> >
>> > I'm thinking of using a zener diode plus resistor on the MISO line as I
>> > don't want to use a full level shifter IC to just protect this one line.
>> > (These are not bi-directional level shifters so I would have to use a
>> > second level shifter.)
>> >
>>
>> BTW, I forgot to mention the reason why I am not just using the obvious
>> solution of a inline diode (even a Schottky one) is because I am concerned
>> about the additional voltage drop, especially if MISO is not been driven at
>> near 3.3V to begin with.
>>
>

> How about just a series resistor? Say you're cranking the SPI at 20
> MHz, and the MISO pin represents 5pF when acting properly as an input.
> A 1K resistor gives you a 90% risetime of only 10 ns out of your 50, and
> limits the current into the device's ESD clamp to under 1.5 mA.
>

Thank you for the suggestion; that will certainly work just fine when the
device has a clamp installed.

I have however seen warnings that not all SPI devices are protected with
clamps and when I look closer at the datasheets, I do see that while some
datasheets (ie: Microchip's SPI RAM range) have ESD data listed, others
are silent on this subject.

Given that I am just trying to protect against coding errors causing ~5V
to be output by the MCU onto the MISO line, I guess the question is do
people actually protect against this (and in a general way which works
at SPI speeds even in the absence of clamps), or am I just been too
paranoid ? :-)

Thanks,

[Mark Borgerson]

In article <kf0der$ttc$1...@dont-email.me>,
clubley@remove_me.eisner.decus.org-Earth.UFP says...

>
> On 2013-02-07, Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:
> >
> > However, connecting MISO directly makes me nervous in case of coding errors
> > which result in the MISO line been driven as a output by the MCU.
> >
> > I'm thinking of using a zener diode plus resistor on the MISO line as I
> > don't want to use a full level shifter IC to just protect this one line.
> > (These are not bi-directional level shifters so I would have to use a
> > second level shifter.)
> >
>
> BTW, I forgot to mention the reason why I am not just using the obvious
> solution of a inline diode (even a Schottky one) is because I am concerned
> about the additional voltage drop, especially if MISO is not been driven at
> near 3.3V to begin with.
>
> Simon.

My usual approach to level mismatch issues is to use one of
the single-gate buffers on each line. One example is
the 74SZ125. They are 5V tolerant when run off a 3.3V
supply. They come in SOT23-5 packages which are small enough
so that they don't use a lot of board space, but large enough
to be hand soldered.

Why are you worried about bi-directional shifters? IIRC, MISO
always goes in just one direction. Depending on your SPI
speed requirements, you might be able to protect the MISO
input in one of two ways:

1. a serial resistor to limit currents to/from MISO. This
will affect rise time on the signal dependent on the input
capacitance of the buffer.

2. Use another pin to enable the output of the buffer
driving MISO. A transient output on MPU MISO that is
not accompanied by an appropriate level on the enable
line will cause no harm.


Mark Borgerson

[Rocky]

On Friday, February 8, 2013 2:53:35 AM UTC+2, Simon Clubley wrote:
> Given that I am just trying to protect against coding errors causing ~5V
> to be output by the MCU onto the MISO line, I guess the question is do
> people actually protect against this (and in a general way which works
> at SPI speeds even in the absence of clamps), or am I just been too
> paranoid ? :-)

Yes you are.

We had a project with a PIC18 talking to a Wiznet 5100 and unfortunatly mis-configured the PIC so that the MISO was being driven by another peripheral cause the system to read corrupted data from the Wiz when it heated up (it always runs hot). Eventually we discovered our problem. The W5100s all survived.

[Bruce Varley]

"hamilton" <hami...@nothere.com> wrote in message
news:kf0do6$2uq$1...@dont-email.me...

If you're planning on significant data rates, just beware of the fact that
the Sparkfun device is passive pullup.

[Simon Clubley]

On 2013-02-07, Rocky <Rober...@gmail.com> wrote:
> On Friday, February 8, 2013 2:53:35 AM UTC+2, Simon Clubley wrote:
>> Given that I am just trying to protect against coding errors causing ~5V
>> to be output by the MCU onto the MISO line, I guess the question is do
>> people actually protect against this (and in a general way which works
>> at SPI speeds even in the absence of clamps), or am I just been too
>> paranoid ? :-)
>
> Yes you are.
>

At least I suspected I might be. :-)

> We had a project with a PIC18 talking to a Wiznet 5100 and unfortunatly
> mis-configured the PIC so that the MISO was being driven by another peripheral
> cause the system to read corrupted data from the Wiz when it heated up (it
> always runs hot). Eventually we discovered our problem. The W5100s all
> survived.

Thanks. This is just the kind of real world event I was interested in
hearing about although I do see however from the W5100 specs that the
I/Os are 5V tolerant.

Thanks for the feedback.

[Simon Clubley]

On 2013-02-07, Mark Borgerson <mborg...@comcast.net> wrote:
>
> Why are you worried about bi-directional shifters? IIRC, MISO
> always goes in just one direction. Depending on your SPI
> speed requirements, you might be able to protect the MISO
> input in one of two ways:
>

I will be using a level shifter to down shift the other SPI lines from
the 5V MCU to the 3.3V SPI devices. As the level shifter is not
bi-directional, I cannot use a spare channel on the same device to level
shift MISO in the other direction.

MISO does always go in one direction; from the SPI slave to the SPI master.
My goal here is to protect against my dropping 5V onto the line in the
other direction (ie: _from_ the MCU) because I configured the MCU for
output by mistake. I also wanted to do it without having to use another
16 pin level shifter.

> 1. a serial resistor to limit currents to/from MISO. This
> will affect rise time on the signal dependent on the input
> capacitance of the buffer.
>
> 2. Use another pin to enable the output of the buffer
> driving MISO. A transient output on MPU MISO that is
> not accompanied by an appropriate level on the enable
> line will cause no harm.
>

Thanks.

In the circuits I have seen, the 3.3V slave MISO is directly connected
into the 5v master. Given enough tolerance on what is seen as logic 1
on the MCU input, that works just fine if the code works perfectly.

However, it just felt "unsafe" if the code was wrong, hence my posting.

[Rob Gaddi]

On Fri, 8 Feb 2013 12:52:55 +0000 (UTC)
Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:

> I will be using a level shifter to down shift the other SPI lines from
> the 5V MCU to the 3.3V SPI devices. As the level shifter is not
> bi-directional, I cannot use a spare channel on the same device to level
> shift MISO in the other direction.
>

Actually, Mark makes an excellent point. Real "level shifter" chips
tend to be large and pricey. All you really need is a quad-channel
3.3V logic buffer with 5V tolerant inputs.

A NC7WZ125 is a dual tri-state buffer in a US8. You could use 1 1/2 of
them to level-shift the outbound lines, and the remaining 1/2 to
protect the MISO of your delicate SPI device from being accidentally
driven by the CPU. If you're sharing the SPI bus, you could drive
the OE of MISO buffer from the SSEL to that chip. Whole thing will
cost you less than $0.40.

If you're not sharing the SPI bus and don't need the tri-state, you
could even go to just a dumb dual buffer like a NC7WZ17; gets you a
6-pin SOT23 instead and brings the cost down a few cents more.

[Joe Chisolm]

On Fri, 08 Feb 2013 12:52:55 +0000, Simon Clubley wrote:

> On 2013-02-07, Mark Borgerson <mborg...@comcast.net> wrote:
>>
>> Why are you worried about bi-directional shifters? IIRC, MISO always
>> goes in just one direction. Depending on your SPI speed requirements,
>> you might be able to protect the MISO input in one of two ways:
>>
>>
> I will be using a level shifter to down shift the other SPI lines from
> the 5V MCU to the 3.3V SPI devices. As the level shifter is not
> bi-directional, I cannot use a spare channel on the same device to level
> shift MISO in the other direction.
>
> MISO does always go in one direction; from the SPI slave to the SPI
> master. My goal here is to protect against my dropping 5V onto the line
> in the other direction (ie: _from_ the MCU) because I configured the MCU
> for output by mistake. I also wanted to do it without having to use
> another 16 pin level shifter.

Put something like a SN74AHCT1G08 between the uC and the SPI. It will
run at 5V and level shift the SPI to the uC. The SPI device will
normally tri-state the MISO line if it's not active so you could put
a pull-up to 3V3 on the input side and that would assure a +5 output
back to the uC. So if the uC did drive the pin you should be OK.

You could also put a resistor between the uC and the buffer
output to limit any current that might be driven back into the
'1G08 output pin

You can get these little logic guys in SOT-23, sc-70 and SOT-553

>
>> 1. a serial resistor to limit currents to/from MISO. This will affect
>> rise time on the signal dependent on the input capacitance of the
>> buffer.
>>
>> 2. Use another pin to enable the output of the buffer driving MISO.
>> A transient output on MPU MISO that is not accompanied by an
>> appropriate level on the enable line will cause no harm.
>>
>>
> Thanks.
>
> In the circuits I have seen, the 3.3V slave MISO is directly connected
> into the 5v master. Given enough tolerance on what is seen as logic 1 on
> the MCU input, that works just fine if the code works perfectly.
>
> However, it just felt "unsafe" if the code was wrong, hence my posting.
>
> Simon.


--

Chisolm
Republic of Texas

[Simon Clubley]

On 2013-02-08, Rob Gaddi <rga...@technologyhighland.invalid> wrote:
> On Fri, 8 Feb 2013 12:52:55 +0000 (UTC)
> Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:
>
>> I will be using a level shifter to down shift the other SPI lines from
>> the 5V MCU to the 3.3V SPI devices. As the level shifter is not
>> bi-directional, I cannot use a spare channel on the same device to level
>> shift MISO in the other direction.
>>
>
> Actually, Mark makes an excellent point. Real "level shifter" chips
> tend to be large and pricey. All you really need is a quad-channel
> 3.3V logic buffer with 5V tolerant inputs.
>

Thanks Rob and Joe for your additional comments.

As a hobbyist, I still prefer to work in PDIP where possible, but I have
looked at the devices you mention.

However, I think the proper solution is to move down into the 3.3V area
so that the level shifters are not required. I've been thinking about
doing that for a while and this week's research has only more strongly
pushed my thinking in that direction.

That does leave the opposite problem of interfacing to legacy 5V devices,
but with the MCUs I've looked at having 5V tolerant inputs, that will
hopefully be a far easier problem to solve.

I think I am going to finish off my current 5V projects then go to 3.3V.

Thanks to everyone for their suggestions over the last couple of days.