Efficient implementation of sophisticated encryption on GA144

[jmdrake]

I posted this on comp.lang.forth, but I'm posting this hear as well

because this group has a better signal to noise ratio.

Here are some papers I ran across where researchers are implementing 

sophisticated encryption algorithms on the GA144 (AES and RSA) and

getting good results.

http://hpcl.gwu.edu/asap2013/presentations/AppAccI/asap_2013.pdf

https://www.hgi.rub.de/media/sh/veroeffentlichungen/2013/05/07/GA144_crypto.pdf

You get get 6 implementations of AES on 1 GA144 chip.  In comparison

to other microcontrollers tested in the research, the GA144 was 

orders of magnitude faster and used orders of magnitude less 

power.  Only a custom ASIC and another mutlicore chip performed

better.  (The other chip is AsAP many-core prototype.  The paper

suggested that one reason for its better performance is that it

used a smaller CMOS fabrication.  It is interesting to know that

the AsAP required 39 of its 164 cores to implement AES as opposed

the the GA144 only using 17 cores.  Thus while you could get 6

AES implementations on a GA144, the most you could get on an

AsAP is 4.  Oh, and for those wondering about the math, because

of how the cores are laid out, some of the GA144 cores can't be

used.  Otherwise you'd get 8 implementations of AES on one GA144.)

I remember when Chuck first talked about this on SlashDot, he said

it was a solution looking for a problem.  Well....solution meet

problem.  :)  I just wish Jeff Fox was hear to see this.  It's

nice to see third party researchers validating the GA144 design.