Fwd: [HiPEAC Publicity] MICRO 2023 Call for Papers

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Grigori Fursin

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Mar 14, 2023, 9:29:57 AM3/14/23
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-------- Forwarded Message --------
Subject: [HiPEAC Publicity] MICRO 2023 Call for Papers
Date: Fri, 10 Mar 2023 22:39:44 -0500
From: Christina Giannoula <cgian...@cs.toronto.edu>
Reply-To: Christina Giannoula <cgian...@cs.toronto.edu>
To: publ...@hipeac.net




====================================================
                   CALL FOR PAPERS

   56nd Annual IEEE/ACM International Symposium 
            on Microarchitecture (MICRO)

                   M I C R O   2 0 2 3   

                     Toronto, Canada


            October 27 - November 1, 2023

           https://www.microarch.org/micro56
====================================================

The International Symposium on Microarchitecture (MICRO) is the premier 
forum for presenting, discussing, and debating innovative microarchitecture 
ideas and techniques for advanced computing and communication systems. 
This symposium brings together researchers in fields related to 
microarchitecture, compilers, chips, and systems for technical exchange 
on traditional microarchitecture topics and emerging research areas. 
The MICRO community has enjoyed a close interaction between academic 
researchers and industrial designers, and we aim to continue this tradition 
at MICRO-56. In 2023, MICRO goes to Toronto, Canada.

https://www.microarch.org/micro56

Important Dates
---------------
Abstract: April 21, 2023 at 11:59 PM PDT

Full Paper: April 28, 2023 at 11:59 PM PDT

Rebuttal/Revision: June 26 – July 7, 2023

Author Notification: July 24, 2023



We invite original paper submissions related to (but not limited to)
the following topics:
* Microarchitectural, architectural, compiler, and hybrid techniques for 
improving system performance, power, energy-efficiency, security, cost, 
complexity, programmer productivity, predictability, quality of service, 
reliability, dependability, scalability, sustainability
* Processor, memory, and storage architectures
* Multicore and multiprocessor systems
* Instruction-, thread-, and data-level parallelism
* Prediction and Speculation
* Memory Hierarchy
* Cloud and datacenter-scale computing
* IoT, mobile, and embedded architecture
* Interconnection network, router, and network interface architecture
* Accelerator-based, application-specific, and reconfigurable architectures
* Architectural support for programming languages, compilation, 
software development, security and privacy, virtualization
* Architectures for emerging technologies and applications
* Architectural support for non-volatile/persistent memory
* Quantum computing
* In-/near-memory or in-/near-storage processing
* Approximate computing and architectural support for approximation
* Effects of circuits and technology on architecture
* Architecture modeling and simulation methodologies
* Evaluation and measurement of real computing systems


Submission Guidelines
---------------
- Papers must be submitted in printable PDF format.
- Text must be in a minimum 10pt font.
- Papers must be at most 11 pages, not including references.
- Line spacing (leading) must be no less than 11pt.
- No page limit for references.
- References must include all authors (i.e., do not use et al.).
Submissions should follow the guidelines and formatting rules
specified on the conference website 

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