1) x86 reloads cr3 to flush/invalidate tlb.
2). every time modifying the page table entry of kernel address space,
flush_tlb_kernel_range() or flush_tlb_all() should be called except
the page table entry is 0 before modification. Actually
flush_tlb_kernel_range() just calls flush_tlb_all() on x86.
flush_tlb_all() will send interrupt to all CPUs to execute do_flush_tlb_all()
which will invalidate all tlb.
3). every time modifying the page table entry of user address space, f
lush_tlb_mm(), flush_tlb_page() or flush_tlb() should be called except
the page table entry is 0 before modification. Actually flush_tlb_mm(
), flush_tlb_page() and flush_tlb() do the almost the same things: you
can think flush_tlb() just calls flush_tlb_mm(current->mm) and flush_
tlb_page() just calls flush_tlb_mm(vma->vm_mm). flush_tlb_mm() will se
nd tlb flushing interrupt (smp_invalidate_interrupt) to all CPUs on wh
ich the current processes use the same active_mm with the mm argument
of flush_tlb_mm() and the CPUs that receive the interrupt will flush t
lb.
4). There is a lazy TLB mode to reduce the number of flushing tlb. Whe
n a CPU (assume CPU 0) switches to a kernel thread (assume named "A"),
the kernel thread will use the active_mm of previous thread (assume n
ame "B") as its active_mm and the cr3 will not be reloaded. The CPU 0
now enters the lazy tlb mode. If there is no tlb flushing interrupt re
ceived on CPU 0 during execute thread A and CPU0 will switch to execut
e thread B again, the cr3 will not be reloaded and the CPU 0 will leav
e the lazy tlb mode. If there is a tlb flushing interrupt received on
CPU 0 during execute thread A, the CPU 0 finds that it is in lazy tlb
mode, it will clear the related flag to tell system that do not send m
ore tlb flushing interrupt to CPU 0 (kernel thread A will not use any
user space address). Then if CPU0 will switch to execute thread B agai
n, the cr3 will be reloaded due to the related flag has been cleared i
n smp_invalidate_interrupt() (some page table entry for process B has
been modified). The CPU 0 will leave the lazy tlb mode now.
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