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һ���Ӳ��ֿ�

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Jun 16, 2014, 11:27:24 AM6/16/14
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�������ڿ��ڴ����ϣ�������ȫ�벻������Ӧ�õij�����������ô��֤����cpu�ϵ��ڴ���ͼ��һ���ԣ����о���Ϊʲô�ڴ�����Ҫ���ʹ�ã�rmb��wmb���������rmb/wmb��������mb����Ҫ���ʹ����

лл��ţ�㲦һ��

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[m [1;37m�� ��Դ:��ˮľ���� newsmth.net��[FROM: 123.113.68.*] [m

like a rolling stone

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Jun 16, 2014, 12:18:35 PM6/16/14
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of coz

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�� �� llky (һ���Ӳ��ֿ�) �Ĵ������ᵽ: ��
: �� ��: �ڴ����ϵ����⣬ΪʲôҪ���ʹ��
: ����վ: ˮľ���� (Mon Jun 16 23:27:23 2014), ת��
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: [m [1;37m�� ��Դ:��ˮľ���� newsmth.net��[FROM: 123.113.68.*] [m


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[m [1;34m�� ��Դ:��ˮľ���� newsmth.net��[FROM: 171.221.70.*] [m

һ���Ӳ��ֿ�

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Jun 16, 2014, 9:27:18 PM6/16/14
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�� �� rollstone (like a rolling stone) �Ĵ������ᵽ: ��
: �� ��: Re: �ڴ����ϵ����⣬ΪʲôҪ���ʹ��
: ����վ: ˮľ���� (Tue Jun 17 00:18:35 2014), ת��
:
: of coz
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: rmb��wmb����mb���������
�õģ�лл����ôΪʲômbҪ���ʹ���أ�

: �� �� llky (һ���Ӳ��ֿ�) �Ĵ������ᵽ: ��
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[m [1;31m�� ��Դ:��ˮľ���� newsmth.net��[FROM: 59.108.29.*] [m

һ���Ӳ��ֿ�

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Jun 17, 2014, 2:03:41 AM6/17/14
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���� kernel �� memory-barrier.txt �����Σ��ɾ��ǿ�����Ϊʲô��ٵ���������Ҫmemory-barrier�����һ���Ҫ��Գ��֣�˭�ܸ��ҽ���

cpu1 �� cpu2 �ϵĴ�����һ���̵߳Ĵ�������cpu1��������һ�£�Ȼ���л���cpu2��ȥ�����ˣ�����˵�������̵߳Ĵ��룬��cpu1���е� ACCESS_ONCE(b) = 2; ʱ��cpu2��ʼ�� x = ACCESS_ONCE(b); ��ʼ���У�

SMP BARRIER PAIRING
-------------------

When dealing with CPU-CPU interactions, certain types of memory barrier
should
always be paired. A lack of appropriate pairing is almost certainly an
error.

A write barrier should always be paired with a data dependency barrier or
read
barrier, though a general barrier would also be viable. Similarly a read
barrier or a data dependency barrier should always be paired with at least an
write barrier, though, again, a general barrier is viable:

CPU 1 CPU 2
=============== ===============
ACCESS_ONCE(a) = 1;
<write barrier>
ACCESS_ONCE(b) = 2; x = ACCESS_ONCE(b);
<read barrier>
y = ACCESS_ONCE(a);

Or:

CPU 1 CPU 2
=============== ===============================
a = 1;
<write barrier>
ACCESS_ONCE(b) = &a; x = ACCESS_ONCE(b);
<data dependency barrier>
y = *x;

Basically, the read barrier always has to be there, even though it can be of
the "weaker" type.


�� �� llky (һ���Ӳ��ֿ�) �Ĵ������ᵽ: ��
: �� ��: Re: �ڴ����ϵ����⣬ΪʲôҪ���ʹ��
: ����վ: ˮľ���� (Tue Jun 17 09:27:17 2014), ת��
:
:
: �� �� rollstone (like a rolling stone) �Ĵ������ᵽ: ��

���ܲ�1��

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Jun 17, 2014, 7:24:51 PM6/17/14
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linux��Ϊһ������ָ��os,���뿼�Ǹ��ֿ��ܵ����
����memory order,��ͱ��뿼��������,�����κ��ڴ������˳���ڲ�ͬ�Ĵ������������п��ܲ�һ��,���ֲ�һ���п�����д��������,Ҳ�п����Ƕ��DZ������,����Ϊ�˱�֤��ȷ��,���߶���Ҫbarrier.
��ֻ�����������,ʵ���ϻ����ܴ���wr, rw֮��IJ�һ����
ʵ�ʵ���������ھ����cpu��ʵ��,������x86��,wb��rb�����ǿյ�,��Ϊ Ӳ����֤�������һ����,������power�϶������������mbָ��

�� �� llky (һ���Ӳ��ֿ�) �Ĵ������ᵽ: ��
: ���� kernel �� memory-barrier.txt �����Σ��ɾ��ǿ�����Ϊʲô��ٵ���������Ҫmemory-barrier�����һ���Ҫ��Գ��֣�˭�ܸ��ҽ���
: cpu1 �� cpu2 �ϵĴ�����һ���̵߳Ĵ�������cpu1��������һ�£�Ȼ���л���cpu2��ȥ�����ˣ�����˵�������̵߳Ĵ��룬��cpu1���е� ACCESS_ONCE(b) = 2; ʱ��cpu2��ʼ�� x = ACCESS_ONCE(b); ��ʼ���У�
: SMP BARRIER PAIRING
: ...................

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[36m�� �޸�:��BigCarrot �� Jun 18 07:24:50 2014 �޸ı��ġ�[FROM: 117.90.222.*] [m
[m [1;32m�� ��Դ:��ˮľ���� newsmth.net��[FROM: 117.90.222.*] [m
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