Sorry, I still don't understand, please correct me if I'm wrong.
For Load Halfword,
(From the document)
"A 16-bit value is fetched from memory and moved into register RegD. The memory address is formed by adding the offset to the contents of Reg1. The value is sign-extended to the full length of the register."
I get the memory address from [instruciton.itype.R1 + sign_extend(instruction.itype.imm, 12)]
Then from that memory address, I only take the first 16 bits, so when I am doing ORs for my word, I only do the first 8 bits, memory[address + 1] << 8,
At the end of that, I sign extend it back to the full length of the register (32 bits) and return that.
I believe that is what I did in my Part2.c Line 395 - 407