Assignment 2 - Random.trace

[Danial]

SFU ID: 301390696 (danialk)

Github username: danialkhan4

Github: https://github.com/CMPT-295-SFU/assignment-2-danialkhan4

Line and file:  part2.c (random.trace)

Expected behavior: set x10 to 0

Observed behavior: set x10 to 1

Question:

I was wondering why in random.trace slt x10, x5, x0 sets x10 to 1 when x5 = 0xffffffff. Shouldnt it be  x5 < x0 is false? If i change my slt to the incorrect inequality (according to risc-v card) it passes the test. 

ref/random.trace file:

r 0=00000000 r 1=00000000 r 2=000efffc r 3=00003000 

r 4=00000000 r 5=ffffffff r 6=00000000 r 7=00000000 

r 8=ffffffff r 9=fffff7ff r10=00000000 r11=00000000 

r12=00000000 r13=00000000 r14=00000000 r15=00000000 

r16=00000000 r17=00000000 r18=00000000 r19=00000000 

r20=00000000 r21=00000000 r22=00000000 r23=00000000 

r24=00000000 r25=00000000 r26=00000000 r27=00000000 

r28=00000000 r29=00000000 r30=00000000 r31=00000000 

r 0=00000000 r 1=00000000 r 2=000efffc r 3=00003000 

r 4=00000000 r 5=ffffffff r 6=00000000 r 7=00000000 

r 8=ffffffff r 9=fffff7ff r10=00000001 r11=00000000 

r12=00000000 r13=00000000 r14=00000000 r15=00000000 

r16=00000000 r17=00000000 r18=00000000 r19=00000000 

r20=00000000 r21=00000000 r22=00000000 r23=00000000 

r24=00000000 r25=00000000 r26=00000000 r27=00000000 

r28=00000000 r29=00000000 r30=00000000 r31=00000000 

[Parmida Vahdatnia]

you are implementing the slt function the other way around, also remember that each register is 32 bits since you are writing your bits manually in that could be a potential place to face bugs.