Lab 4 Part 1 trouble getting results

[Trevor Bonas]

SFU ID:  tbo...@sfu.ca

Github username: trevorbonas

Github: Link to github repo (your assignment repos are private so these links are only accessible to TAs and Instructor): g...@github.com:CMPT-295-SFU/assignment-2-trevorbonas.git

Line and file: Line 58-99 utils.c

Expected behavior: Prints instructions from mac.input to screen

Observed behavior: Prints: 00001000:

Question: I can't get the instructions to print. I think my disassembly code in utils.c is good, though for the S-type I get and concatenate the two imm portions but the lab doesn't say what to do with it after I've got it, it can't go in instruction.stype.imm7 or imm5, there's not enough space. Maybe my sign_extend_number function isn't written properly? I'm not sure.

[Arrvindh Shriraman]

1. Not sure why you are concatenating and calculating offsets at  the time of parsing.

You need to do that in part1.c which is where you are printing.

2. It appears to me your sign extension is broken.

e.g., lets say offset  is 0x800 (12 bit sign to be sign  extended)

You will be calculating

line 10 sign = 0x1

line 11 0x100,,, (followed by 31 0s)

line 12 0x00001(13thbit)000000               (you are doing unsigned shifts so 0s are going to come in from the left)
.....

All you seem to be doing is sign extending by 1 bit. 

Refer to Integers III   Slide 26.

Whatever is the 12 bit you need to copy it to every bit 32...12

https://www.youtube.com/watch?v=5dgj4pPW6fc&t=709s  (You may want to watch 35:00 onwards carefully)

[Trevor Bonas]

Great, I went through and fixed everything and watched the Lab 4 video, everything works perfectly now. My last question is just that in printing the S-type I had assumed rs1 would be the source register in the CPU from where the data is coming from, and would match the RISC-V green card in being the  first field in the MEM_FORMAT, and rs2 be the destination in memory offset by the immediate, but to match the mac.solution I had to print rs2 as the CPU register and rs1 as the destination in memory, why is it structured that way?