Thanks for the response.
We are looking to disable channel interleaving, not node interleaving. If node interleaving is enabled, then contiguous physical addresses map to all the DIMM channels of all the NUMA nodes in an interleaved manner. Disabling node interleaving partitions the physical address ranges between NUMA nodes, but it still leaves the physical addresses interleaved across the DIMM channels within a single NUMA node. After disabling channel interleaving, the physical address ranges will be partitioned between the DIMM channels within a single NUMA node (refer to Figure 10 in
https://www.usenix.org/system/files/osdi26-zhou-yanbo.pdf).
Different BIOS might have the setting under different names; e.g., IMC Interleaving (Auto / 1-way / 2-way; set to 1-way for disabling) or Channel Interleaving (Auto / 1-way / 2-way / 3-way / 4-way; set to 1-way for disabling) or Memory Interleaving / Interleave Mode (set to disabled).
We wanted to specifically check Ice Lake because our current system implementation uses Ice Lake-specific performance counters, which have changed in newer generations. However, if an Ice Lake server with the ability to disable channel interleaving is not available, we would be open to looking at newer generations and porting our system accordingly. If neither Ice Lake nor newer Intel nodes have the option to disable channel interleaving, then we would like to check if any of the AMD nodes mentioned above have this option.