Translation of Just

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peter.t...@gmail.com

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Aug 18, 2025, 9:40:36 AMAug 18
to Clash - Hardware Description Language
I've seen a few instances now where case foo of a -> Just v; _ -> Nothing is translated as (foo == a) ? {1b0,v} : {0b0,{(lotsof)1bx}}     [excuse pseudo verilog]. When v is lots of bits long that produces a gigantic mux that takes up lots of gates to switch between v and undefined.

It should be {(foo==a), v}. No mux.

Apologies if I interpret incorrectly what I have really only noticed out of the corner of a half-closed eye!

Regards

PTB


Rowan Goemans

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Aug 19, 2025, 2:15:42 AMAug 19
to clash-l...@googlegroups.com
`{(foo==a), v}` is overly pessimistic. the `x` indicate don't care bits and from my experience it shouldn't actually introduce any mux unless necessary. Consider the case where you write `result = maybe someDefault id someMaybe`. If clash would do what you propose it would force an introduction of a (potentially large) mux. But keeping the payload bits as undefined allows a synthesis tool to transform (pseudo code):

```
someDefault = ...
someMaybe = (foo == a) ? {1b0,v} : {0b0,{(lotsof)1bx}}
result = someMaybe[0] ? someMaybe[1..] : someDefault
```

to

```
someDefault = ...
someMaybe = (foo == a) ? {1b0,v} : {0b0,{(someDefault}}
result = someMaybe[1..]
```

Which would not be allowed if clash would translate it as you propose, you would get two large muxes instead of one.  If there is no such optimization opportunity the synthesis tool should transform it as you have written. 

Op ma 18 aug 2025 om 15:40 schreef peter.t...@gmail.com <peter.t...@gmail.com>:
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