Altair Hyperworks Error Code 9
Adele Strecker
This thesis presents new methods contributing to the area of software security. Both offensive and defensive methods are proposed, where the offensive methods presented in this thesis mostly deal with how an attacker can embed malicious code in a stealthy manner, and the defensive methods aims at detecting some form of attack.
The first approach deals with how a virtual machine can be detected and we discuss its use as both an offensive as well as a defensive method. We develop a proof-of-concept that aims to demonstrate how the technique works in practice.
Following this we will look at timestamping of data on a massive scale and how by utilizing the blockchain of the Bitcoin network, we can gain Byzantine fault tolerance for the Keyless Signing Infrastructure.
Then we will look at methods for obfuscating code by overlapping assembly instructions in machine code. We do this both by crafting custom no-operation instructions in the binary, but also provide a method to accomplish this in the source code when that source code will be compiled via a deterministic building process to produce the expected binaries.
This thesis investigates the electronic properties of a number of novel III-V materials and material combinations for transistor applications. In particular, high-κ/InAs metal-oxide-semiconductor (MOS) structures and transport properties of GaSb nanowires have been studied. III-V semiconductors are potential candidates to replace Si-based electronics due to their outstanding electron transport properties.
One of the main challenges in the performance of III-V MOS Field-Effect Transistors (MOSFETs) is the integration of high quality high-κ gate oxides. The quality of the oxide and the oxide-semiconductor interface affects the density of trapped charges which subsequently affects the device performance. The first part of the thesis is focused on studying the electrical properties of high-κ/InAs material system. A theoretical model of MOS capacitance-voltage (C-V) response is developed for narrow band gap semiconductors to quantify the densities of InAs-oxide interface and border traps. Different deposition conditions and surface passivation techniques are examined to minimize the trap densities. The optimized structure shows trap densities in the order of 1012 cm-2eV-1, which is comparable to the state-of-the-art high-κ on other high-electron-mobility III-Vs, such as InGaAs.
The second part of the thesis discusses the transport properties of GaSb nanowires. The electrical properties of the nanowires are characterized by fabricating lateral nanowire-based Field-Effect transistors. The thesis further explores a strategy for boosting the mobility in GaSb nanowires using strained GaSb/InGaAs core-shell nanowires.
This doctoral thesis is addresses two topics in integrated circuit design: multiband direct conversion cellular receivers for cellular frequencies and beam steering transmitters for millimeter wave communication for the cellular backhaul. The trend towards cellular terminals supporting ever more different frequency bands has resulted in complex radio frontends with a large number of RF inputs. Common receivers have, for performance reasons, in the past used differential RF inputs. However, as shown in the thesis, with novel design techniques it is possible to achieve adequate performance with a single ended frontend architecture, thereby reducing the complexity and pin-count. Millimeter wave integrated circuits development has previously not been subject to the mass production requirements that have been put on chip sets for cellular terminals, i.e. a minimum number of circuits, low supply voltage and power consumption, together with programmability to handle process spread and performance fine tuning. However, in the near future, when 5G networks will be deployed and the number of small pico- and femtocell base stations will explode, there will be a strong demand for low cost and high performance single-chip millimeter wave beam steering transceivers. The millimeter wave circuits presented in this work have been designed in a SiGe bipolar technology. Traditionally, SiGe designs use a higher supply voltage compared to CMOS. In this work, however, it has been shown that millimeter wave transceivers can be designed using a low supply voltage, thereby reducing the power consumption and eliminating the need for dedicated voltage regulators. Paper I presents a 28 GHz QVCO with an I/Q phase error tuning and detection. In paper II a 28 GHz beam steering PLL is presented together with measurement results for the design in paper I. Measurement results for the beam steering PLL are shown in paper III. Simulation results for a two-stage 81-86 GHz power amplifier are provided in paper IV. Paper V shows measurement results for two E-band power amplifiers. In paper VI, simulation results are presented for a complete E-band transmitter including a three-stage power amplifier. A reconfigurable single-ended CMOS LNA for different cellular frequency bands is presented in paper VII. A single-ended multiband RF-amplifier and mixer with DC-offset and second order distortion suppression in BiCMOS technology is presented in paper VIII.
As the address space of IPv4 is being depleted with the development of IoT (Internet Of Things), there is an increasing need for permanent transition to the IPv6 protocol as soon as possible. Nowadays, many 3GPP Networks have implemented or will implement IPv6 in the near future for Internet access. These networks will also use NDP (Neighbor Discovery Protocol), which is the IPv6 tailored version of ARP (Address Resolution Protocol). The protocol is responsible of address auto-configuration, maintaining lists of all neighbors connected to a
network, verifying if they are still reachable, managing prefixes and duplicate address detection. The protocol is defined in RFC 4861 and although it works fine for wired connected devices, it has been proven highly inefficient in terms of battery lifetime saving, when wireless networks came to the market and its use increased tremendously. This thesis work is a continuation of a previous master thesis and complements the work done previously by showing how the solutions suggested in the new draft can be implemented at the router and host side and practically confirms the previous results of the theoretical analysis through simulation scenarios of sleep and wake-up of the nodes, performed in OMNeT++. Subsequently, the scalability of the system as a whole was analyzed with a simulation model containing a range of hosts from 1 to 100, and shows it can operate efficiently on a larger scale, reducing multicast messaging by almost 100%, presumably saving their battery power .
Location awareness is one of the most important requirements for many future wireless applications. Multipath-assisted indoor navigation and tracking (MINT) is a possible concept to enable robust and accurate localization of an agent in indoor environments. Using knowledge of a floor plan of the environment and the position of the physical anchors, specular multipath components can be exploited, based on a geometry-based stochastic channel model. So-called virtual anchors, which are mirror images of the physical anchors, are used as additional anchors for positioning. In this way additional position-related information is exploited that is contained in the radio signals. This position-related information is based on the CRLB of the position error for a GSCM to account for geometry dependent MPCs as well as for stochastically modeled diffuse/dense multipath. It shows that the SINR of each useful MPC quantities the amount of position-related information.
The quality of this additional information also depends strongly on the accuracy of the corresponding floor plan. Therefore, probabilistic MINT was introduced that has the aims (i) to remove the requirement of a precisely known a-priori floor plan and (ii) to cope with uncertainties in the environment representation. In probabilistic MINT the VAs are treated as RV and comprised in a geometry-based probabilistic environment model (GPEM). The resulting probabilistic multipath-assisted feature-based simultaneous localization and mapping (SLAM) approach can operate without any prior knowledge of the floor plan.
Dr. Karl Nieman, Senior Wireless Platform Architect, National Instruments
Kyle Teegarden, Product Marketing Engineer, National Instruments
Dr. Fredrik Tufvesson, Professor of radio systems, Lund University
Dr. Liang Liu, Associate Professor, Lund University
Dexter Johnson, Moderator
In the coming years, telecommunications providers face the daunting challenge of increasing data rates while also expanding network capacity by orders of magnitude. High channel count MIMO technologies such as Massive MIMO offer unique benefits that can address these concerns and enable 5G networks. To move Massive MIMO from theory to reality, however, advanced hardware must be combined with challenging signal processing.
In this webinar, we will go over the creation of the world's first real-time Massive MIMO system at Lund University, Sweden. This successful deployment produced a host of field trial results, but also revealed new challenges in Massive MIMO development. We will cover lessons learned from the Lund system while also diving deep into the signal processing used, including reciprocity calibration, MIMO precoding, and MIMO decoding. Finally, we will discuss the future of Massive MIMO research and standardization. Join us to learn how you can begin building your own Massive MIMO testbed to tackle these challenges.
New spectroscopic techniques, such as photocurrent detected two-dimensional spectroscopy, require analog to digital converters with very high dynamic range. In such techniques, one measures the linear as well as the nonlinear response from the sample that are excited by modulated light. Typically, the linear signal is 100 to 1000 times larger than the nonlinear signal. Thus, ADCs with very high dynamic range are necessary to measure both the signals simultaneously. It is required to digitize and store the measured signals to be able to transfer the data to a computer in order to process the information. In this thesis project, a 2-channel, 23bit, and 4MS/s digitizing system has been build which meets the aforementioned application requirement. The project includes system architecture design, ADC sampling control, digital data processing on FPGA, PC interfacing, as well as control software implementation.
c80f0f1006