Call for papers: Digital Design and Verification with Chisel (DDVC)

[Martin Schoeberl]

Call for papers: Digital Design and Verification with Chisel (DDVC)

https://dsd-seaa.com/dsd_ddvc/

Performance increase with general-purpose processors has come to a halt. We can no longer depend on Moore’s Law to increase computing performance. Building domain-specific hardware accelerators is the only way to achieve higher performance or lower energy consumption. To date, hardware design has been challenging, as we are using tools and languages from the last century.

We can learn from software development trends such as agile software development to develop and verify those accelerators efficiently. Chisel, as a domain-specific hardware construction language embedded in Scala, leverages actual software methods for hardware construction and verification. 

Topics of interest include, but are not limited to:

* Digital designs using Chisel
* Hardware generators in Scala and Chisel
* Extensions of the Chisel language
* Chisel in teaching
* Chisel libraries
* Design verification with Chisel and ChiselTest
* Formal verification of Chisel designs
* FIRRTL compiler, including CIRCT
* FIRRTL transformation and optimization pathes
* Combining Chisel and UVM or cocotb for verification
* Other hardware construction languages

This special session is part of the Euromicro Conference on Digital System Design (DSD 2025).

29th Euromicro Conference Series on Digital System Design (DSD) 2026 will be held at the AGH University of Kraków, Poland, from 2nd to 4th of September 2026.

See: https://dsd-seaa.com/dsd2026/

Paper Submission Deadline: May 11th, 2026

Cheers,
Martin Schoeberl
Special Session Chair