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Hi,
I'm trying to instantiate multiple instances of the same module in chisel for example
val X1 = Module(new Y(proto= ...)) val X2 = Module(new Y(proto= ...)) val X3 = Module(new Y(proto= ...)) val X4 = Module(new Y(proto= ...)) ... upto n times I've tried mapping them to List, so val X = Module(new Y(proto= ...)) val Y = (0 until n).map(x => X).toList
The chisel compiles but when I do hardware simulation I can only see one module not multiple ones in this method.
Can someone point out why this is happening, I've tried googling but of no help ? :(
Thank you
Edward Wang
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Dec 5, 2023, 10:06:55 AM12/5/23
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Additionally, are all the modules used? FIRRTL/CIRCT I believe will remove unused hardware elements so that might be another possibility.
Kevin Laeufer
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Dec 5, 2023, 10:33:24 AM12/5/23
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Something that might also be worth trying is:
val Y = (0 until n).map(_ => Module(new Y(proto= ...))).toList
The difference here is that this now calls the constructor n times.
The previous version was just copying the _reference_ to the module n
times. I.e., you got n references to the same module instance.