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soham bhattacharya
Aug 12
Loop problem
Hi there, Good day. I am new in chisel. I am doing a simple addition and want to see the add value
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Loop problem
Hi there, Good day. I am new in chisel. I am doing a simple addition and want to see the add value
Aug 12
Øyvind Harboe
, …
Øyvind Harboe
3
Aug 10
Warning in Chisel 3.5.4
On Wed, Aug 10, 2022 at 8:32 PM Jack Koenig <jack.koenig3@gmail.com> wrote: It would be helpful
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Warning in Chisel 3.5.4
On Wed, Aug 10, 2022 at 8:32 PM Jack Koenig <jack.koenig3@gmail.com> wrote: It would be helpful
Aug 10
Shimomura Shigeki
Aug 9
Re: Digest for chisel-users@googlegroups.com - 2 updates in 2 topics
Shimomura Shigeki さんから Gmail 情報保護モードでメールが送信されました。 Re: Digest for chisel-users@googlegroups.com - 2
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Re: Digest for chisel-users@googlegroups.com - 2 updates in 2 topics
Shimomura Shigeki さんから Gmail 情報保護モードでメールが送信されました。 Re: Digest for chisel-users@googlegroups.com - 2
Aug 9
Martin Schoeberl
Aug 9
ip-contributions 0.5.0
Dear all, I've published version 0.5.0 of ip-contributions. It is ready for Chisel 3.5. See:
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ip-contributions 0.5.0
Dear all, I've published version 0.5.0 of ip-contributions. It is ready for Chisel 3.5. See:
Aug 9
Jack Koenig
Jul 30
Chisel v3.5.4 has been released!
Hello Chiselers, I am very delighted to announce that we have released v3.5.4 of the various Chisel-
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Chisel v3.5.4 has been released!
Hello Chiselers, I am very delighted to announce that we have released v3.5.4 of the various Chisel-
Jul 30
Øyvind Harboe
, …
Øyvind Harboe
3
Jul 30
SInt vs. UInt and division
Ah. Silly me :-) I was confused, all I was missing was to write: val a : UInt val b : UInt val c :
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SInt vs. UInt and division
Ah. Silly me :-) I was confused, all I was missing was to write: val a : UInt val b : UInt val c :
Jul 30
Pinaki Chakrabarti
,
lae...@berkeley.edu
2
Jul 29
Not able to use peek, poke, step and expect for testing a simple hardware description
Hi Pinaki, I would recommend you start with the chisel template which can be found here: https://
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Not able to use peek, poke, step and expect for testing a simple hardware description
Hi Pinaki, I would recommend you start with the chisel template which can be found here: https://
Jul 29
Martin Schoeberl
Jul 26
VecInit
Dear all, When I use a Vec as a combinational circuit (a mux) I need to wrap it into a Wire. When
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VecInit
Dear all, When I use a Vec as a combinational circuit (a mux) I need to wrap it into a Wire. When
Jul 26
Kartik Prabhu
,
Martin Schoeberl
2
May 31
Grouping Modules
Modules, which are Scala classes, are the tool to structure your circuit in modules/components. This
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Grouping Modules
Modules, which are Scala classes, are the tool to structure your circuit in modules/components. This
May 31
Warren Savage
, …
Øyvind Harboe
4
May 18
Chiseltest performance for representation of memories
What I did when I needed gigabytes of memory for a design, is that I implement the memory in C++
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Chiseltest performance for representation of memories
What I did when I needed gigabytes of memory for a design, is that I implement the memory in C++
May 18
ashrir...@gmail.com
,
Øyvind Harboe
2
May 7
Left shift possible code gen error
That looks correct to me. Maybe a little bit surprising, but correct. Can you elaborate on why this
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Left shift possible code gen error
That looks correct to me. Maybe a little bit surprising, but correct. Can you elaborate on why this
May 7
Øyvind Harboe
4
Apr 28
FlatIO problem with Chisel 3.5.3
Another error I see: [info] firrtl.passes.CheckHighFormLike$UndeclaredReferenceException: @[FooUnit.
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FlatIO problem with Chisel 3.5.3
Another error I see: [info] firrtl.passes.CheckHighFormLike$UndeclaredReferenceException: @[FooUnit.
Apr 28
Jack Koenig
Apr 26
Chisel v3.5.3 has been released!
Hello Chiselers, I am very delighted to announce that we have released v3.5.3 of the various Chisel-
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Chisel v3.5.3 has been released!
Hello Chiselers, I am very delighted to announce that we have released v3.5.3 of the various Chisel-
Apr 26
ashrir...@gmail.com
,
Martoni
3
Apr 22
illegal cyclic reference to Module
That was a typo in my question description. But the issue still persists. Here is more strangeness 1)
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illegal cyclic reference to Module
That was a typo in my question description. But the issue still persists. Here is more strangeness 1)
Apr 22
Øyvind Harboe
Mar 18
Is there a way to convert FIRRTL to Yosys json file without Yosys?
I would like to use https://github.com/nturley/netlistsvg to generate diagrams. Is there a way to
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Is there a way to convert FIRRTL to Yosys json file without Yosys?
I would like to use https://github.com/nturley/netlistsvg to generate diagrams. Is there a way to
Mar 18
talco...@gmail.com
Mar 4
Tensil open source ML inference accelerator
Hey everyone, We've released Tensil v1.0.0, an open source machine learning inference accelerator
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Tensil open source ML inference accelerator
Hey everyone, We've released Tensil v1.0.0, an open source machine learning inference accelerator
Mar 4
Martoni
Mar 3
Absorb wire for IO blackbox connection
Hello, I have a problem with the last version of Gowin EDA synthesizer (1.9.8.03) as I explained on
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Absorb wire for IO blackbox connection
Hello, I have a problem with the last version of Gowin EDA synthesizer (1.9.8.03) as I explained on
Mar 3
ahmad othman
Mar 1
binary literals
if i have x value. as follow: val x = UInt("b1010", 12) how can i take the first 2 bits
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binary literals
if i have x value. as follow: val x = UInt("b1010", 12) how can i take the first 2 bits
Mar 1
jjb vhc
Feb 17
sv2chisel 0.5.0 release
Dear Chisel community, I am quite proud to announce the first proper release of sv2chisel, the
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sv2chisel 0.5.0 release
Dear Chisel community, I am quite proud to announce the first proper release of sv2chisel, the
Feb 17
Øyvind Harboe
Feb 10
Deduplication and unused outputs of modules
Deduplication doesn't take into account unused values. So if I have module where an output is
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Deduplication and unused outputs of modules
Deduplication doesn't take into account unused values. So if I have module where an output is
Feb 10
Øyvind Harboe
2
Feb 10
3.5.1 testing
These error were all real problems in the unit-test code. Neat feature! Otherwise everything worked
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3.5.1 testing
These error were all real problems in the unit-test code. Neat feature! Otherwise everything worked
Feb 10
Jack Koenig
Feb 7
Chisel v3.5.1 has been released!
Hello everyone, I am very delighted to announce that we have released v3.5.1 of the various Chisel-
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Chisel v3.5.1 has been released!
Hello everyone, I am very delighted to announce that we have released v3.5.1 of the various Chisel-
Feb 7
Warren Savage
,
Kevin Laeufer
2
Feb 6
Examples of using traits to modify published classes?
Hi Warren, My advice for parameterizing modules would be to use plain good-old case classes with
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Examples of using traits to modify published classes?
Hi Warren, My advice for parameterizing modules would be to use plain good-old case classes with
Feb 6
Øyvind Harboe
,
Jack Koenig
4
Jan 29
0 bit wide integers
That's good to hear! Looking forward to this feature :-) The problem with not having zero width
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0 bit wide integers
That's good to hear! Looking forward to this feature :-) The problem with not having zero width
Jan 29
Øyvind Harboe
,
Jack Koenig
2
Jan 28
Scala 2.12 and 2.13 problems with publishLocal?
Yes these instructions don't work as well anymore since we publish SNAPSHOTs in CI. We need to
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Scala 2.12 and 2.13 problems with publishLocal?
Yes these instructions don't work as well anymore since we publish SNAPSHOTs in CI. We need to
Jan 28
Øyvind Harboe
,
Jack Koenig
3
Jan 27
The case of the missing stack trace
This is a fantastic question, I've opened a PR to chiseltest to add instructions for this
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The case of the missing stack trace
This is a fantastic question, I've opened a PR to chiseltest to add instructions for this
Jan 27
Øyvind Harboe
, …
Jack Koenig
6
Jan 27
Another case of problems with Vec.toSeq
Thanks! I have closed the PR. Before the issues with the Scala compiler/type checking is fully
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Another case of problems with Vec.toSeq
Thanks! I have closed the PR. Before the issues with the Scala compiler/type checking is fully
Jan 27
Martin Schoeberl
,
Martoni
3
Jan 26
3rd Edition of the Chisel Book is out
Hi Martoni, Amazon did not update the cover and not yet the looking inside. However, it is the third
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3rd Edition of the Chisel Book is out
Hi Martoni, Amazon did not update the cover and not yet the looking inside. However, it is the third
Jan 26
Øyvind Harboe
,
Jack Koenig
2
Jan 25
Chisel v3.5.0 testing
Thank you for letting us know and glad to hear! On Tue, Jan 25, 2022 at 7:15 AM Øyvind Harboe <
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Chisel v3.5.0 testing
Thank you for letting us know and glad to hear! On Tue, Jan 25, 2022 at 7:15 AM Øyvind Harboe <
Jan 25
Martin Schoeberl
, …
Richard Lin
3
Jan 19
asUint vs U
If I remember correctly, when these were first introduced, the idea was to use .U for numeric
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asUint vs U
If I remember correctly, when these were first introduced, the idea was to use .U for numeric
Jan 19