SRAM issues with sky130 Rocket Core Bring-Up

[Varun Somashekar]

Hello,

I am with a group at my university evaluating the Rocket Core for our project. We are running into issues with the sky130 VLSI flow process, specifically with the SRAM mapping via MacroCompiler.

We are using a version 1.8.1 of Chipyard so that we can use OpenRAM macros for the VLSI flow for vanilla RocketConfig with no modifications. sram-cache-gen.py was used to generate a new sram-cache.json with the compiled SRAM macros I have which are:

sky130_sram_16kbyte_1rw1r_32x4096_8
sky130_sram_1kbyte_1r1w_8x1024_8
sky130_sram_1kbyte_1rw1r_32x256_11
sky130_sram_1kbyte_1rw1r_32x256_2
sky130_sram_1kbyte_1rw1r_32x256_22
sky130_sram_1kbyte_1rw1r_32x256_8
sky130_sram_1kbyte_1rw1r_8x1024_24
sky130_sram_1kbyte_1rw1r_8x1024_8
sky130_sram_1kbyte_1rw1r_8x1024_8_norbl
sky130_sram_1kbyte_1rw_32x256_8
sky130_sram_2kbyte_1rw1r_32x512_8
sky130_sram_2kbyte_1rw_32x512_8
sky130_sram_4kbyte_1rw1r_128x256_128
sky130_sram_4kbyte_1rw1r_32x1024_8
sky130_sram_4kbyte_1rw_32x1024_8
sky130_sram_4kbyte_1rw_64x512_8
sky130_sram_8kbyte_1rw1r_32x2048_8
sky130_sram_8kbyte_1rw_64x1024_8
sram_1rw1r_32_256_8_sky130

When make buildfile is run, MacroCompiler errors "unable to compile cc_ext_dir and strict mode is activated - aborting."

Additionally, on previous build attempts I have gotten a different errors from MacroCompiler -- one that the maskGran does that match between the mem and lib (17 bit granularity was requested but not present) and one that the port count must match (requested 1, but only dual-ported SRAMs present). For these errors, it is my understanding that they shouldn't happen since 

a) odd numbers like 17 aren't allowed in OpenRAM and 

b) sram-cache.gen.py doesn't cache single-ported SRAMs.

Any guidance in getting past these errors would be appreciated!

--

Varun