Hello Chipyard Developers and Community,
I am encountering a simulation assertion failure when running specific Gemmini baremetal tests on Chipyard v1.10.0. The Gemmini submodule is at commit f13847e8.
Issue Description:
The standard tiled_matmul_ws-baremetal test completes successfully. However, when I run tests that include more complex operations like softmax or layernorm, the simulation consistently fails with an assertion error in ReservationStation.scala.
Environment:
OS: Ubuntu 22.04
Chipyard Version: 1.10.0
Gemmini Commit Hash: f13847e8
Commands to Reproduce:
1. Successful Command:
2. Failing Command (e.g., with softmax):
Assertion Failure Log:
The failing simulation produces the following error, indicating an invalid entry is being accessed in the reservation station:
For reference, the log from the successful run (tiled_matmul_ws-baremetal.log) completes as expected:
My Analysis:
The assertion assert(entries_st(issue_id).valid) suggests that the reservation station is receiving an instruction to issue an entry that is not valid. Since this only occurs for workloads with softmax/layernorm, it seems related to how these specific micro-operations are scheduled or tracked within Gemmini's pipeline.
Could someone please provide insight into what might be causing this assertion failure? I would also appreciate any recommendations for further debugging steps, such as specific signals to trace or configuration changes to try.
Thank you for your time and assistance.
Hello Chipyard Developers and Community,
I am encountering a simulation assertion failure when running specific Gemmini baremetal tests on Chipyard v1.10.0. The Gemmini submodule is at commit f13847e8.
Issue Description:
The standard tiled_matmul_ws-baremetal test completes successfully. However, when I run tests that include more complex operations like softmax or layernorm, the simulation consistently fails with an assertion error in ReservationStation.scala.
Environment:
OS: Ubuntu 22.04
Thank you for your time and assistance.