Issues generating verilator waveforms .vcd files with chipyard

[Yuval Mandel]

I have been making a medium boom processor using an existing config without alterations with the line:

make CONFIG=MediumBoomV3Config VCD=1

or the line

make debug CONFIG=MediumBoomV3Config

and running with:

./simulator-chipyard.harness-MediumBoomV3Config(-debug)  pk ./../../test.riscv

But I am not getting a .vcd file to analyse with a waveform.

The test.c file is simply an init of a variable and multiplying it by 2.

What could be the issue?

Thanks.

Yuval