Hi all, Chipyard release 1.15.0 was just published. For a list of changes, see the release notes here

Hi all, For research purpose, I'm trying to understand and reproduce the BERT results reported in

Following the thread. On Sunday, May 10, 2026 at 7:27:57 AM UTC+2 fra...@vip.sina.com wrote: The

Apologies for the burst — my mail queue appears to have suffered from head-of-line blocking and just

Hi All, Firstly, I have been having some issues posting to the mailing list, so not sure if this is

Hi, The plan for regular Chipyard releases is great news, I have been spending a bit of time with

Two quick updates on the CHIA hackathon: The winning team will now also receive an NVIDIA RTX 5080

Oops, forgot +Angela Yue Cui +Ferran Hermida Rivera +Jack Toubes in CC. Feel free to reach out to us

Hi everyone, I hope you are doing well. We saw this discussion regarding BOOM on Zynq FPGA boards,

Hi everybody, For research purposes we want to prototype one (slightly modified) BOOM core (Mega-

Hi all, I'm trying to learn how to use chipyard, and to generate some designs to run on an FPGA.

Answering my own question... It looks like the typical approach is to fork the repo and make your

Dear Sir, have you fixed this error? On Wednesday, December 17, 2025 at 5:27:37 PM UTC+7 Fizza Haq

Hi Chipyard Team, I am currently setting up Chipyard and encountering an issue during the toolchain

Hi all, I am trying to setup a Chipyard environment on my Ubuntu 22.04 LTS machine and I am getting

Hi Chipyard maintainers, I am writing to politely follow up on an issue I recently submitted to the

Hello, I am currently working on integrating a prefetcher into the BOOM core. In the abstract

Hi, I am Navya. I am currently running CoreMark on the Saturn core with both Rocket and Shuttle

Hi everyone — quick question about synthesizing CVA6 with Cadence Genus. I'm running synthesis

Hi Fizza, Sorry for the late reply. This is my understanding of how Gemmini interacts with TileLink

The final address for bootrom is decided by class WithBootROM (generators/chipyard/src/main/scala/

Hi, Just as mentioned , Is there any LLM/SLLM demo running with gemmini and RVV? I think this is an

Soru İçeriği (Body): Hi everyone, I'm trying to bring up Gemmini on a Nexys Video board using the

To add Custom Core into Chipyard : in the chipyard/generators/mytile/src/main/resources/vsrc add the

Dear MªJosé, Thinh, From my previous experience, FP units are very LUTs-costly. You can try to use

Hi, I am trying to generate the verilog (and later run simulations) from my design, but I get stuck

Hi, I've created a design that is a modification of the BOOM, and when trying to generate the

Hi, I get the following error when I try to set up Chipyard on my local machine with riscv-tools:

Hi, Can you brief the method you have followed to successfully program the zcu102 using chipyard

Hello I'm trying to check the cycle count in Saturn VPU(+Rocket core) using Verilator. My