4 Openings - ASIC/FPGA Verification Engineer - San Jose, CA - Longterm

[Abdul Aijaz]

Hi, 

Hope your day treating well..!
 

Please send me the updated resume to abd...@systelcomputers.com  if you’re comfortable with the below job description. 

Position: ASIC/FPGA Verification Engineer

Location: San Jose, CA

Duration: Longterm

 

Job Description:

·         5 years ASIC/FPGA verification experience
·         Knowledge of UVM, Verilog, System Verilog, Tcl/PERL/Python or other scripting tools
·         Build UVM verification test bench using System Verilog or equivalent to validate multiple FPGAs
·         Create bus functional models for PCIe, I2C, MDIO and other IO interfaces of the FPGAs
·         Write tests cases and validate functionality of FPGAs
·         Develop regression environment
·         Familiar with Altera FPGA tools
·         Hands on lab bring up experience

Abdul Aijaz

Resourcing Specialist
Desk: 678-250-9868
Email: abd...@systelcomputers.com    

Yahoo : abdula....@gmail.com