Hello, I am not discouraged at all! On the contrary I like good discussion!
The gate drivers seems a bit pricey for the application. Hoping so much to get away with only those 2n7002 and PNP pairs :)
For the 4051 mux I studied the datasheet and reached the conclusion that their driving voltage is proportional to the supply, so needs level amplification, and the opamps were there readily available. There was some misleading information about 4051-s ability to perform level conversion, it needed some negative supply. I have no sample of 4051 at the hand yet, so had no chance to make real measurements, only go by the datasheet. The current understanding is that it needs level conversion.
When routing the board I noticed that with the two MUXes the routing bitween them is a bit of a mess so that could use some improvement. The CD4097 would be ideal candidate for that, yes, but must check availability. To be honest related to that, I already changed to the two 4052-s (2x4ch mux) in the next improvement version (not finished yet).
I do not understand what you mean about tuning CMRR?
C6 was intended to be the same as C7 I just forgot to make note about it in the schematic.
I am a little worried indeed about the software and how I would get it running. All the calibration and stuff. Been looking the code a little, but must admit it is quite unclear to me at the moment.I tried to import the code to the Eclipse IDE to get the glimpse of general structure and what calls to where, do not know if this is the right way to go.Took the pin names directly from the IMAX reverse engineered circuit and left them same to preserve compatibility. That is all correct that I was scared to change the CPU because I am not enough familiar with the code, so do not want to get stuck with uncompatible CPU.
I guess you are reffering that it would be easier to whack in another replacement CPU when names clear. That is good idea, and definitely work in progress already :).As for the notes from the routing the board I actually would prefer CPU with less pins and use SPI port and shift registers for output extenders. Also the MUX-es are very much my liking. It is quite big work and headache routing all the wires across the board to the single many pins CPU.
I've been interested in the digitalWrite() part of the code, very much would like to snoop out from the disassembly listing how the compiler optimizes those functions. For example for Arduino there is digitalWriteFast library that makes extensive use of macros to optimize port writes basically to the single machine insturction, and since digitalWrite is used many times in the code it makes huge speed and flash savings. I would very much like to know if the compiler optimizes the function same way when there are calls to inline functions as in sheali. The peak for me about the code in the moment is that I was able to compile the code sucessfully following the instructions provided.

But there is problem with the charging current. Calibrated the voltages and currents, but now the testing shows that current displayed when charging is not correct. When set to 1000mA, it shows 1000mA, but actual current to the battery is only about 560mA (During the 1000mA current calibration real current and displayed current is matching).
There seems to be missing the calibration for the Vbatt? It is in the calibration menu but can not be activated.
Calibration point is selectable in the menu there is 0 and 1. Do not know it that is working or not? Is it meant to be to calibrate one point with empty battery and one with full?
I get the about 0.6 volts reading on the next cell after the one that is connected. This is becuse the opamp still sees last cells full voltage at its negative input and is then unable to drive fully close to the 0. Then seems the software thinks that there is 6 cells connected instead of 5 and for some reason refuses to charge at all. So the current status of the charger is still unusable.
"becuse the opamp still sees last cells full voltage at its negative input" not sure why this happens. You can change threshold when cheali considers cell as not present. I believe it is now set somewhere around 0.4V.


