Xbox 360 Slim Error 0101

[Paz Warsager]

Thiserror is caused (Officially) by a read/write problem with the RAM chips on your Xbox 360 console. If you have the secondary error code of 0101, you are looking at an advanced repair and issue with your console. If you are unfamiliar with the repair processes below, your best bet would be looking to replace your motherboard, or even trying an X-clamp fix. So let's get deeper.

Since this 0101 secondary error code is caused by your Xbox 360's RAM chips not being able to read/write, we'll start there. Performing a reflow on the RAM chips is a great place to start. If you don't see results you should consider replacing the RAM chips as well. If this is done and your 0101 secondary error hasn't cleared, you need to move on to the GPU

Now that you know the RAM isn't directly causing your 0101 secondary error code. It's time to move on to the Xbox 360 GPU. The GPU can also malfunction due to a cold solder joint underneath. A reflow or reball would be the best place to start here. If all else fails a complete replacement of the GPU may also be needed to clear this error.

In either case, the console may be dangerous to operate. As a result, when the SMC enters EC_FATAL, all devices will immediately be shut down and all controllable voltages will be turned off. The SMC does NOT wait for the DVD tray to close so that the system powers down as quickly as possible.

EC_THERMAL is triggered when the CPU, GPU, or eDRAM thermal diode exceeds its Thermal Trip Temperature. All devices will immediately be shut down and all controllable voltages except V_12P0 (which powers the fans) will be turned off. The SMC does NOT wait for the DVD tray to close so that the system powers down as quickly as possible.

The front panel indicates a Core Digital/System Component Failure or a Universal Error Message. The Secondary Error Code will reflect the error. For some codes, a Universal Error Message will be displayed on screen.

The message contains instructions to contact Xbox Support and the Secondary Error Code will be displayed converted from base-4 into decimal, with an E in front of it. For example, the 1022 error will display "E 74".

Once the console enters a failure mode and the red lights are displayed, the error code can be accessed via the following procedure. Be sure to reference the table below to reliably determine each value of the error code.

The outer ring of the Ring of Light on the Xbox 360 E can no longer light up in segments. When retrieving the error code using the procedure above, the values are displayed via the number of blinks. For example, if the ring blinks 2 times, and then pauses, and then blinks 2 times again, the value is 2.

ANA_V12P0_PWRGD is driven high by the ANA (later HANA) as long as the V_12P0 rail is within tolerance. If V_12P0 ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0001 code to be displayed on the front panel.

VREG_CPU_PWRGD is driven high by the V_CPUCORE controller as long as the rail is within tolerance. If V_CPUCORE ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0002 code to be displayed on the front panel.

VREG_GPU_PWRGD is driven high by the V_GPUCORE controller as long as the rail is within tolerance. If V_GPUCORE ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0003 code to be displayed on the front panel.

VREG_V3P3_PWRGD is driven high by the V_3P3 controller as long as the rail is within tolerance. If V_3P3 ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0003 code to be displayed on the front panel.

The SMC monitors the CPU thermal diode as reported by the ANA/HANA. If the CPU temperature exceeds the Trip Temperature defined in the SMC Config, the SMC enters EC_THERMAL and the 0011 code is displayed on the front panel.

The SMC monitors the GPU thermal diode as reported by the ANA/HANA. If the GPU temperature exceeds the Trip Temperature defined in the SMC Config, the SMC enters EC_THERMAL and the 0012 code is displayed on the front panel.

The SMC monitors the eDRAM thermal diode as reported by the ANA/HANA. If the eDRAM temperature exceeds the Trip Temperature defined in the SMC Config, the SMC enters EC_THERMAL and the 0013 code is displayed on the front panel.

After GPU power and clocking are available, the SMC starts seqUnReset which releases the GPU from reset. It then waits for the GPU to assert GPU_RST_DONE. If the GPU_RST_DONE signal is not asserted in the time allotted, EC_BOOT will be reported. The SMC will retry 4 more times. If on the final attempt, GPU_RST_DONE is still not asserted, the SMC remains in EC_BOOT and the 0020 code is displayed on the front panel.

After receiving GPU_RST_DONE during seqUnReset, the SMC monitors the PCIe L0 status and waits for the link to enter the L0 state. If the link does not enter the L0 state in the time allotted, EC_BOOT will be reported. The SMC will retry 4 more times. If on the final attempt, the link still does not enter L0 state, the SMC remains in EC_BOOT and the 0021 code is displayed on the front panel.

After the PCIe link has entered the L0 state during seqUnReset, the SMC releases the CPU from reset. The CPU will run the Bootloaders and start the XSS. When the XSS starts, it will attempt to retrieve the power up cause from the SMC. If the SMC does not receive GetPowerUpCause in the time allotted, EC_BOOT will be reported. The SMC will retry 4 more times. If on the final attempt, GetPowerUpCause is still not received, the SMC remains in EC_BOOT and the 0022 code is displayed on the front panel.

VREG_VEDRAM_PWRGD is driven high by the V_CPUEDRAM controller as long as the rail is within tolerance. If V_CPUEDRAM ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0023 code to be displayed on the front panel.

VREG_V5P0_VMEM_PWRGD is driven high by the V_5P0/V_MEM controller as long as the rail is within tolerance. If V_5P0 or V_MEM ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0031 code to be displayed on the front panel.

VREG_V5P0_PWRGD is driven high by the V_5P0 controller as long as the rail is within tolerance. If V_5P0 ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0031 code to be displayed on the front panel.

VREG_CPUCORE_VCS_PWRGD is driven high by the V_CPUVCS controller as long as the rail is within tolerance. If V_CPUVCS ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0032 code to be displayed on the front panel.

VREG_VMEM_PWRGD is driven high by the V_MEM controller as long as the rail is within tolerance. If V_MEM ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0033 code to be displayed on the front panel.

The 2BL tries to retrieve the vendor ID from each memory chip. If any of the IDs cannot be read or mismatch, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, the IDs still cannot be read or mismatch, the SMC remains in EC_XSS and the 0100 code is displayed on the front panel.

During 2BL memory initialization, if data cannot be written for read strobe training, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, data still cannot be written, the SMC remains in EC_XSS and the 0101 code is displayed on the front panel.

During 2BL memory initialization, if read strobe delay training fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, training still fails, the SMC remains in EC_XSS and the 0102 code is displayed on the front panel.

During 2BL memory initialization, if write strobe delay training fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, training still fails, the SMC remains in EC_XSS and the 0103 code is displayed on the front panel.

During 2BL memory initialization, if a memory addressing line fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, a memory addressing line still fails, the SMC remains in EC_XSS and the 0110 code is displayed on the front panel.

During 2BL memory initialization, if a memory data line fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, a memory data line still fails, the SMC remains in EC_XSS and the 0111 code is displayed on the front panel.

Occurs if the Southbridge can't communicate with the Ethernet PHY, or the vendor ID of the PHY is incorrect. The SMC enters EC_XSS, the E 75 UEM will be displayed, and the 1023 code is displayed on the front panel.

This error can be triggered by a faulty power supply or a short in the console.The short is located near one of the main supply lines, so not under the chips, it might also be a blown capacitor fuse or just a bridged contact.

This error occurs if something goes wrong while flashing the drive or installing a modchip.A sign for it is that the dvd-drive doesnt eject the tray anymore.

DVD drive timed out during reset.

It can also be caused by a faulty DVD power or SATA cables(edsondario & Fios89)

This error occurs if something goes wrong while flashing the drive or installing a modchip.A sign for it is that the dvd-drive can still be flashed and read out.

According to XBH: DVD drive is not DMA configured

1)If you soldered anything to the mainboard before it occured, whatever you are powering from this point is drawing too much power so get rid of it.Also get rid of everything that you can see that might bridge anything near the GPU.

2) X-Clamp replacement Hybrid - Tighten the GPU screws facing the HANA chip slightly more and make sure to be using a shim

2) X-Clamp replacement Hybrid - Tighten the GPU screws facing the HANA chip slightly more and make sure to be using a shim. Adding an extra shim on each side of the smaller chip dye will help to create more surface against the heatsink and will increase the chances of the error going away for good.

3) If there is a lot of flexing under the GPU, bake the board to unflex it

4) Reflowing GPU and HANA chip

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