Re: Config BlackParrot flash on VC707 FPGA

[Daniel Petrisko]

Fantastic guide Glenn, I’ve learned this method the hard way and it’s great that others don’t have to suffer the same fate ;)

Best,

-Dan

On Aug 6, 2024, at 11:09 PM, Glenn Baxter <gl...@petacat.com> wrote:



Hi Lap,

I wanted to give you a bit more detail as I was near my computer now.

When you want to create wrap an IP so it can be used by IP Integrator (IPI), you have to use the IP Packager (IPP) tool.   But before you can do this, you need to make sure that the repo for IP is set at a global level. 

1.  Start a new project with whatever settings you want (set the FPGA part to what you want)

2.  Once project is open, in the Flow Navigator tab, click on Settings to open up the Settings dialog

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3.  With the Settings dialog open, click on the IP Defaults to get to the IP Defaults tab so you can add the local repo for all designs after this one (Global setting, but only takes effect for new projects)

Click the plus and add a repo (make sure the directory exists before you do this)

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4. Once you have added the Default IP Repository Search Path, click on Apply and then on OK.  If you fail to do this, strange things can happen in Viviado.

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5.  You can do things from here in one of two ways you can create any interfaces (so they act like Master and Slave busses), or you can wrap your existing file to make it an IP.   If you do the Interface(s) first, then you can add those (using the techniques in UG1118) interfaces by choosing the correct sets of ports in IPP and asking it to auto-infer the interface (which you then have to point it to.  If its done “correctly” it will know its a MASTER or SLAVE and will auto hookup the nets,   A word of caution, I’ve yet to figure out how to edit Interfaces once they are crafted.   The only way I know to do it is to hand edit the .sv file that it produces, and even that has to be done very carefully.

One of the challenging things I’ve seen is that when you define an interface, The interface is not directly parametrizable in the tool.  You can hand do it using a text editor, but what it really wants is for you to set the bus width manually,  e.g. 64 bits wide.

6.  Creating an interface looks basically like this:

6.a. Open the create Interface definition tool:   under Tools —> Create Interface Definition

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6.b.  This will open the initial dialog:

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Note that you *must* set the location correctly to reference the *same* IP Repo that you set above in step 3.    

6.c. You must also set the Vendor and Name correctly in order for the interface to be correctly produced.  Decide what you want Vendor to be set for, as this will be a global instance name that you will need to always use.   The Name that you use will be the name that will show up when you want to use the bus interface definition in IPP or even in IPI. Below is my example to show you how we’d build an interface

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6.d.  Once you’ve got things set the way you want, then click the OK button in the Create Interface Definition dialog.   The dialog will close and a new window will open up that looks like the below:

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6.e. Now you *must* complete the Name, Description and Display Name fields.   These can be filled with nearly anything, but make them meaningful for the Interface and your usage of it.  Remember that this interface will be available for anyone who wants to use it and has the ip_repo set up on their IP Defauilts.   Here is an example of useful names filled in. Note, IIRC, the Description field will be the tooltip that will happen if someone hovers the mouse over.  I try to keep Name and Display Name as short as possible, and the same so that instances of the use of the interface will be easy to find and work with.  

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6.f.  Now it is time to start creating the signals that will make up the interface.  It’s important to do this correctly for the interface to work the way you’d expect any other “bus” in IPI to work.   That is, IPI is smart enough to know that as Master is the source (nearly always on the left side of a block), and that MASTER is capable of connecting to only one SLAVE, and of the same type.  So for example, IPI will not permit you to tie together an AXI interface with a foo interface.  If you tried to do in TCL, the TCL file would execute to that point and then halt with an error.  The challenge is the degrees of difficulty trying to find out where the error is. Often it is very cryptic.

We will start by creating first a clock, then a reset.   To create the first signal click on the “+” (Add Interface Port) in the tab - "comp_bid_foo v1.0”.  Below is what it looks like when it is filled out.  NOTE that you *MUST* set direction correctly for both Master and Slave, and that the Display Name field is correct.  This is super important for when IPI/IPP is trying to infer signal names, you need a means to find signals.  The best way to do this is to have the top level ports of your IP defined with something like S00_foo_clk, S00_foo_reset_n, S00_foo_data_in, S00_foo_data_out, etc. The “_foo_xxx” will be used to match names.  Matching does not work well if a suffix is added but prefix are ok. In some cases you can leave the Default Value unmarked. 

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6.g.  Clicik on the OK to add the clock pin for the FOO interface.   The tab will update to look like this:

After the clock pin add it will look something like the below.  (Note that I have moved the width of some columns so its easier to read the contents

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6.h. Now we will add reset pin. We will make the reset negative true, even though I hate negative true resets!

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6.I.  Click OK to add the reset pin

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6.J.  Now we going to add data signals for Read and Write

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6.k.  Now add byte enable (4 in this case)

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When this is all done, here is what it looks like in the tab:

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6.L. Add Address, RD and WR, and ACK signals 

On May 24, 2024, at 1:50 AM, Daniel Petrisko <petr...@cs.washington.edu> wrote:

Creating an IPI block for and connecting to the HLS output is generally easiest. You can find examples of how to do this painlessly here (“master” has a method that works, but this PR has a much more robust flow”) https://github.com/black-parrot-hdk/zynq-parrot/pull/92

Best,

-Dan

On May 23, 2024, at 8:22 AM, Lap Dang <lap...@gmail.com> wrote:

Hi Dan,

I wanna  connect an IP (IP RTL  build from code C by Vitis HLS) with BlackPrrot core.

How should I do?

1. Open code BlackParrot core by Vivado Gui and connect with IP

Or

2. Integrate code C of this IP into BlackParrot source code

Pls advice, thanks.

Được gửi từ iPhone của tôi

Vào ngày 23 thg 5, 2024, lúc 21:17, Daniel Petrisko <petr...@cs.washington.edu> đã viết:

Hi Lap, 

Can you clarify what inputs and and outputs you’re talking about?

Best,

-Dan

On May 23, 2024, at 12:49 AM, Lap Dang <lap...@gmail.com> wrote:

Hi team,

Can I build RTL of BlackParrot core?

Được gửi từ iPhone của tôi

Vào ngày 13 thg 4, 2024, lúc 17:52, Lap Dang <lap...@gmail.com> đã viết:



Hi Dan,

Thank you for your response.

1. I go to the example folder and try 'make' but seem NOT effective. Can I build bitstream in Vivado GUI?

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2. I am really a newbie so I don't know how to modify it. Can you have a detailed guideline?

Thank you so much,

Lap

Vào Th 7, 13 thg 4, 2024 vào lúc 17:34 Daniel Petrisko <petr...@cs.washington.edu> đã viết:

Hi Lap,

1) to build bitstream, you should be the “vivado” directory of whichever example you are building. The outputs will be there in the standard vivado folders (.runs, etc)

2) you should not have to modify RTL. The tcl script in the vivado directory is board and vivado version specific, so you will have to look at the existing script and modify it for your board. It should not be a large change, but vivado tends to change properties, parameters and defaults between versions

Best,

-Dan

On Apr 12, 2024, at 11:01 PM, Lap Dang <lap...@gmail.com> wrote:

Hi team,

I just clone git: https://github.com/black-parrot-hdk/zynq-parrot and run make_file to build bitstream. I am newbie and I have some questions:

1. Where the location will save the output file after build done?

2. Can you share a guideline to config on VC707 board, I tried change 'bp_axi_top' but failed. Pls give a help. Thank you.

---

Best,

Lap

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