Are there any resources to learn Systemverilog?

[Koustubh Jain]

Hi everyone,

I am an undergrad student enrolled in a 5 year electronics engineering program (currently in the 2nd year). I recently had a course on processor architecture where I learned about instruction set architecture and pipelined implementation of a basic processor based on the toy Y86 ISA (which is somewhere between a RISC and a CISC ISA). This course and a prior course on the basics of VLSI design (using MAGIC) inspired me to look for open source hardware related projects to contribute to. 

I found Blackparrot on the Fossi website. I learned Verliog as a part of my courses, are there any resources available online I could use to learn about SystemVerilog? I would love to contribute to the blackparrot project.

[Prof. Michael Taylor]

https://docs.google.com/document/d/1xA5XUzBtz_D6aSyIBQUwFk_kSUdckrfxa2uzGjMgmCU/edit#heading=h.mtsevafs4tag

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