On Jan 11, 2:20 pm, Gawen ARAB <g...@wenarab.com
> Please send it to me and I will include it on github in the tools directory
> > (if that's OK with you).
> *Sure*. Currently I'm bit-banging the JTAG protocol through a 115200b UART
> connection, so it's very slow (1h15 to read the bootloader, 6h to write it).
Ouch! All but the most desperate would give up before then :).
> I'm going to code a fresh optimized and open-source version (I used some of
> my proprietary code for now) without bit-bang and come back to you with the
> ported code.
OK, but don't optimise it too much, I think the protocol makes use of
ISA bus timing to slow the transitions appropriately for the RDC
chip. When I converted my code to run on AVR it didn't work. It did
work, however, by connecting an AVR to my JTAG cable, and passing the
logic signals through it, so there is nothing preventing an AVR
programmer from working. It's only about timing (which I never got
right). I abandoned the AVR idea after that.