RDC JTAG documentation

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Gawen Arab

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Jan 10, 2013, 10:16:22 AM1/10/13
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Hello there,

I'm looking for any documentation about the JTAG protocol with the RDC CPU.

I'm trying to make the Python JTAG scripts (https://github.com/bifferos/bb/tree/master/tools/jtag) works with my own JTAG cable (which doesn't require LPT port).

I'm porting the code from rdc.py (https://github.com/bifferos/bb/blob/master/tools/jtag/rdc.py) for my JTAG cable, and I'm a bit in trouble with the results I have. I can talk with the CPU but the data I receive is not conform to what I read in the rdc.py documentation header. Makes a few hours I'm trying different solutions, but nothing. (to be precise, the returned CPU state after initialization is said to be 0x8381. And I receive 0x21C1).

So I'd like to dig more into the specific JTAG protocol of RDC to debug my software. Where all this info from the rdc.py documentation comes from ? I checked in the RDC specification and I found nothing.

Any idea where I can find any spec ?

Thank you and happy near year :-)

Gawen

Gawen Arab

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Jan 10, 2013, 3:33:23 PM1/10/13
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OK it finally works.

For anyone interested, I made a JTAG cable for the Biffboard based on at ATmega (will work on Arduino), usable through UART, and patched rdc.py to make Biff's code work with it. Tested to dump, program, debug. If anyone is interested by the tool, feel free to contact me.

However, I'm still interested by the JTAG documentation anyway, if anybody has more info about it (Biff ?).

Sincerely,

Gawen

Andrew Scheller

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Jan 10, 2013, 7:27:21 PM1/10/13
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I've no idea if it'll be helpful to you, but there's a whole bunch of links in
http://groups.google.com/group/bifferboard/browse_thread/thread/c7903a45a5f9f50

Lurch
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biff...@yahoo.co.uk

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Jan 11, 2013, 5:25:51 AM1/11/13
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On Thursday, January 10, 2013 8:33:23 PM UTC, Gawen Arab wrote:
OK it finally works.

For anyone interested, I made a JTAG cable for the Biffboard based on at ATmega (will work on Arduino), usable through UART, and patched rdc.py to make Biff's code work with it. Tested to dump, program, debug. If anyone is interested by the tool, feel free to contact me.

Please send it to me and I will include it on github in the tools directory (if that's OK with you).

However, I'm still interested by the JTAG documentation anyway, if anybody has more info about it (Biff ?).

rdc.py was written by reverse-engineering the protocol, so it is all guesses!  There is no information available from RDC about this protocol as far as I'm aware.  If you find anything wrong in those docs in rdc.py, please correct it and send me a patch.

An Arduino-based JTAG programmer will be very useful though, so thanks in advance for that.

regards,
Biff.
 

Sincerely,

Gawen


Gawen ARAB

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Jan 11, 2013, 9:20:48 AM1/11/13
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rdc.py was written by reverse-engineering the protocol, so it is all guesses!  There is no information available from RDC about this protocol as far as I'm aware.  If you find anything wrong in those docs in rdc.py, please correct it and send me a patch.

Amazing work.

Please send it to me and I will include it on github in the tools directory (if that's OK with you).

Sure. Currently I'm bit-banging the JTAG protocol through a 115200b UART connection, so it's very slow (1h15 to read the bootloader, 6h to write it).

I'm going to code a fresh optimized and open-source version (I used some of my proprietary code for now) without bit-bang and come back to you with the ported code.

Thank you.

~ G
A
+33 6 65 42 31 83
http://gawen.me/


biff...@yahoo.co.uk

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Jan 11, 2013, 3:03:31 PM1/11/13
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On Jan 11, 2:20 pm, Gawen ARAB <g...@wenarab.com> wrote:
> Please send it to me and I will include it on github in the tools directory
>
> > (if that's OK with you).
>
> *Sure*. Currently I'm bit-banging the JTAG protocol through a 115200b UART
> connection, so it's very slow (1h15 to read the bootloader, 6h to write it).

Ouch! All but the most desperate would give up before then :).

> I'm going to code a fresh optimized and open-source version (I used some of
> my proprietary code for now) without bit-bang and come back to you with the
> ported code.

OK, but don't optimise it too much, I think the protocol makes use of
ISA bus timing to slow the transitions appropriately for the RDC
chip. When I converted my code to run on AVR it didn't work. It did
work, however, by connecting an AVR to my JTAG cable, and passing the
logic signals through it, so there is nothing preventing an AVR
programmer from working. It's only about timing (which I never got
right). I abandoned the AVR idea after that.

best regards,
Biff.

Gawen ARAB

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Jan 11, 2013, 3:17:51 PM1/11/13
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Ouch!  All but the most desperate would give up before then :).

I'm pretty desperate :-).


OK, but don't optimise it too much, I think the protocol makes use of
ISA bus timing to slow the transitions appropriately for the RDC
chip.  When I converted my code to run on AVR it didn't work.  It did
work, however, by connecting an AVR to my JTAG cable, and passing the
logic signals through it, so there is nothing preventing an AVR
programmer from working.  It's only about timing (which I never got
right).  I abandoned the AVR idea after that.

I finally have an Arduino-compatible firmware which has all the internal code inspired from rdc.py . The initialization procedure is for now still done by Python as the ATmega internal function doesn't work. Probably a timing problem. But the chunk read / write functions programmed in the Atmega do work, and make the program work 100x faster (16B/s to 16kB/s). I can read the bootloader in 15s.

FYI, each clock switch is timed (at least) by 1µs. And it seems there is a new status code 0x8380 which may say something like "operation in progress".

Anyway, I will test the code a bit further, re-write it to make it open-source compatible and I will push the Atmega and Python codes to bifferos/bb.git . That's the least we can do to thank you all after all the community's work.

(OP will deliver :-))

Regards,

Gawen

Gawen ARAB

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Jan 11, 2013, 3:20:56 PM1/11/13
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and make the program work 100x faster (16B/s to 16kB/s). I can read the bootloader in 15s.

Looks like I'm not good at math. 100x faster, 16B/s to 1.36KiB/s, 40s to read the bootloader.

chema

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Jun 3, 2013, 4:58:18 AM6/3/13
to biffe...@googlegroups.com, g...@wenarab.com
Hello Gawen:

Any progress in your code re-write or any plan to publish it early? I'm impatient to see and use it to update my old bootloader ;-)

Another alternative to a parallel cable or an ATMEGA could be GPIO bitbang in a system as Raspberry PI: https://github.com/synthetos/PiOCD/wiki/Using-a-Raspberry-Pi-as-a-JTAG-Dongle. I think this should be similar that Bifferos utility to recover one bifferboard using another one using GPIOs.

Regards,

Chema.
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