On Mon, 15 Jun 2015 18:14:57 -0700 (PDT), you wrote:
>Is there a reason a particular reason that the LED examples connect the current limiting resistor to GND and light the LED with a logic high state on the pin?
>
>I'm more used to TTL open collector where the current limiter goes on VCC and you drive the pin low. Are the GPIO pins on the BBB able to provide the same current in both states? My digital logic knowledge is somewhat dated.
CMOS and HC logic have symmetric pullups and pulldowns. TTL used to
have about 16 ma pulldown (saturating transistor), and about 1 ma up.
TTL did not need a stiff pullup, all it had to do was supply back bias
diode leakage for all the inputs it was driving, but the pulldown had
to sink 1.6 ma per input, so you got 20 pullups and 10 pulldowns.
Harvey