Beaglebone bare metal code

[Ventura]

I have an small code just to blink user leds loaded at address 0x80000000. When I use the bootloader from StarterWare it works perfectly but when I try to load using JTAG in the same address, I get an error that I suppose it's something related with memory protection.

In the past I had the same problem using uBoot when I try to execute Linux in single step. The work around was enable ICACHE using an uBoot function and the kernel loaded with no problem.

At this time I have no loader, just the JTAG interface and I have the same problem. Enabling ICACHE doesn't fix the problem and I still have no chance to execute at 0x80000000. I can succeed loading the program at 0x40300000 where the MMU has no access (I guess!).

background polling: on
TAP: am335x.dap (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa0000193 pc: 0x00026e1c
MMU: disabled, D-Cache: disabled, I-Cache: enabled
JTAG-DP STICKY ERROR
MEM_AP_CSW 0x2800062, MEM_AP_TAR 0x80000000
Failed to write memory at 0x80000000
JTAG-DP STICKY ERROR
MEM_AP_CSW 0x2800062, MEM_AP_TAR 0x800000b4
Failed to write memory at 0x800000b4

Anybody knows how should be the initial configuration to use the address 0x80000000-0xA0000000 ???

I am sure that there is something that I do not understand about memory/cache initialization.


Ventura

[John Syn]

From: Ventura <jorge.arau...@gmail.com>
Reply-To: "beagl...@googlegroups.com" <beagl...@googlegroups.com>
Date: Saturday, August 2, 2014 at 9:20 PM
To: "beagl...@googlegroups.com" <beagl...@googlegroups.com>
Subject: [beagleboard] Beaglebone bare metal code

Code Composer Studio will have GEL files that setup and initialize memory/cache so you can download code and debug. GEL files are easy to read so I suggest you download CCSV6 eval and look for the GEL files for AM335x. Everything you need will be in these GEL files. My guess is you need to initialize DDR3 (memory map, timing, etc) before you are able to download code. Normally, u-boot does this for you. 

Regards,

John

Ventura

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[Jorge Ventura]

John,

Thank you for your reply. I was checking the gel files also at StarterWare (I don't have CCSV6 installed) and you were right. Your email made me understand that the reason for not be working was not related to I-CACHE but the timing to work with the DDR3. To test, I loaded and execute the MLO file from StarterWare (this is the bootloader) and after that, halt using gdb+JTAG, doing that, MMU and D-CACHE and I-CACHE are all disabled and I still could load correctly the code at 0x80000000 correctly.

Sincerely,

Ventura

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[dd]

Hi Ventura.  I am debugging a bare metal MMU and I am having much trouble with
mapping the memory sections (DDR, OCMC, Dev) and cache.
Actually I don't know where the problem is.  It just hangs when I enable IRQ.
Can you tell me exactly how you solved your DDR3 timing problem?

thanks..............dd