Hi Robert,
Here's as far as I've gotten. From your response I
figured you were hinting at me modifying the device tree overlay to
enable the HDMI audio. I looked at the slots on my BBB and found that
the screen is using the BB-BONE-LCD7-01-00A3 overlay. So I downloaded
that one and modified it based on the example you provided.
Here is the result:
/*
* Copyright (C) 2012 Texas Instruments Incorporated -
http://www.ti.com/ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/plugin/;
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
/* identification */
part-number = "BB-BONE-LCD7-01";
version = "00A3";
/* state the resources this cape uses */
exclusive-use =
/* the pin header uses */
"P8.45", /* lcd: lcd_data0 */
"P8.46", /* lcd: lcd_data1 */
"P8.43", /* lcd: lcd_data2 */
"P8.44", /* lcd: lcd_data3 */
"P8.41", /* lcd: lcd_data4 */
"P8.42", /* lcd: lcd_data5 */
"P8.39", /* lcd: lcd_data6 */
"P8.40", /* lcd: lcd_data7 */
"P8.37", /* lcd: lcd_data8 */
"P8.38", /* lcd: lcd_data9 */
"P8.36", /* lcd: lcd_data10 */
"P8.34", /* lcd: lcd_data11 */
"P8.35", /* lcd: lcd_data12 */
"P8.33", /* lcd: lcd_data13 */
"P8.31", /* lcd: lcd_data14 */
"P8.32", /* lcd: lcd_data15 */
"P8.27", /* lcd: lcd_vsync */
"P8.29", /* lcd: lcd_hsync */
"P8.28", /* lcd: lcd_pclk */
"P8.30", /* lcd: lcd_ac_bias_en */
"P9.22", /* lcd: gpio0_2 */
"P9.12", /* led: gpio1_28 */
"P9.14", /* pwm: ehrpwm1a */
"P9.15", /* keys: gpio1_16 */
"P9.23", /* keys: gpio1_17 */
"P9.16", /* keys: gpio1_19 */
"P9.30", /* keys: gpio3_16 */
"P9.21", /* keys: gpio0_3 */
/* the hardware IP uses */
"gpio0_2",
"gpio1_28",
"gpio1_16",
"gpio1_17",
"gpio1_19",
"gpio3_16",
"gpio0_3",
"lcd",
"ehrpwm1a";
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
bone_lcd7_cape_led_00A3_pins: pinmux_bone_lcd7_cape_led_00A3_pins {
pinctrl-single,pins = <
0x078 0x2f /* gpmc_ben1.gpio1_28, INPUT | PULLDIS | MODE7 */
>;
};
pwm_bl_pins: pinmux_pwm_bl_pins {
pinctrl-single,pins = <
0x48 0x06 /* gpmc_a2.ehrpwm1a, OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT */
>;
};
bone_lcd7_cape_lcd_pins: pinmux_bone_lcd7_cape_lcd_pins {
pinctrl-single,pins = <
0x150 0x07 /* spi0_sclk.gpio0_2, OUTPUT | MODE7 - AVDD_EN */
0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xa3 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb0 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
>;
};
bone_lcd7_cape_keys_00A3_pins: pinmux_bone_lcd7_cape_keys_00A3_pins {
pinctrl-single,pins = <
0x040 0x2f /* KEY_LEFT gpmc_a0.gpio1_16, INPUT | PULLDIS | MODE7 */
0x044 0x2f /* KEY_RIGHT gpmc_a1.gpio1_17, INPUT | PULLDIS | MODE7 */
0x04c 0x2f /* KEY_UP gpmc_a3.gpio1_19, INPUT | PULLDIS | MODE7 */
0x198 0x2f /* KEY_DOWN mcasp0_axr0.gpio3_16, INPUT | PULLDIS | MODE7 */
0x154 0x2f /* KEY_ENTER spi0_d0.gpio0_3, INPUT | PULLDIS | MODE7 */
>;
};
};
};
fragment@1 {
target = <&epwmss1>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&ehrpwm1>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&ocp>;
__overlay__ {
/* avoid stupid warning */
#address-cells = <1>;
#size-cells = <1>;
backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pwm_bl_pins>;
status = "okay";
pwms = <&ehrpwm1 0 500000 0>;
pwm-names = "LCD7";
brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
default-brightness-level = <101>; /* index to the array above */
};
tscadc {
compatible = "ti,ti-tscadc";
reg = <0x44e0d000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "okay";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x00 0x11 0x22 0x33>;
};
adc {
ti,adc-channels = <4 5 6 7>;
};
};
gpio-leds-cape-lcd7 {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&bone_lcd7_cape_led_00A3_pins>;
lcd7-led0 {
label = "lcd7:green:usr0";
gpios = <&gpio2 28 0>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&bone_lcd7_cape_keys_00A3_pins>;
#address-cells = <1>;
#size-cells = <0>;
button@1 {
debounce_interval = <50>;
linux,code = <105>;
label = "left";
gpios = <&gpio2 16 0x1>;
gpio-key,wakeup;
autorepeat;
};
button@2 {
debounce_interval = <50>;
linux,code = <106>;
label = "right";
gpios = <&gpio2 17 0x1>;
gpio-key,wakeup;
autorepeat;
};
button@3 {
debounce_interval = <50>;
linux,code = <103>;
label = "up";
gpios = <&gpio2 19 0x1>;
gpio-key,wakeup;
autorepeat;
};
button@4 {
debounce_interval = <50>;
linux,code = <108>;
label = "down";
gpios = <&gpio4 16 0x1>;
gpio-key,wakeup;
autorepeat;
};
button@5 {
debounce_interval = <50>;
linux,code = <28>;
label = "enter";
gpios = <&gpio1 3 0x1>;
gpio-key,wakeup;
};
};
/* Settings for ThreeFive S9700RTWV35TR / LCD7 cape: */
panel {
compatible = "tilcdc,panel";
pinctrl-names = "default";
pinctrl-0 = <&bone_lcd7_cape_lcd_pins>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <16>;
fdd = <0x80>;
tft-alt-mode = <0>;
stn-565-mode = <0>;
mono-8bit-mode = <0>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
native-mode = <&timing0>;
timing0: 800x480 {
hactive = <800>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <40>;
hsync-len = <48>;
vback-porch = <30>;
vfront-porch = <13>;
vsync-len = <3>;
clock-frequency = <30000000>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
fb {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
ti,power-gpio = <&gpio1 2 0x0>;
ti,allow-non-reduced-blanking-modes;
};
};
};
fragment@4 {
target = <&mcasp0>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&mcasp0_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
num-serializer = <16>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 0
0 0 0 0
0 0 0 0
0 0 0 0
>;
tx-num-evt = <1>;
rx-num-evt = <1>;
};
};
fragment@5 {
target = <&ocp>;
__overlay__ {
sound {
compatible = "ti,am33xx-beaglebone-black";
ti,model = "TI BeagleBone Black";
ti,audio-codec = <&nxptda>;
ti,mcasp-controller = <&mcasp0>;
ti,codec-clock-rate = <2457600>;
mcasp_clock_enable = <&gpio2 27 0>; /*BeagleBone Black Clk enable on GPIO1_27, maybe not necessary for my shield */
};
};
};
};
I compiled it on the beaglebone black using the instructions here:
http://elinux.org/BeagleBone_and_the_3.8_Kernel#Cape_Manager_and_Device_Tree_Overlaysand copied it to /lib/firmware
I then rebooted the beaglebone black, but still no HDMI audio. I was thinking of modifying uEnv.txt but I'm not sure if I'm on the right track.
Thanks in advanced for any help you can provide.
Best Regards,
Jorge Garcia