Initializing both CS on SPI1 causes data corruption

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bRitch022

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Sep 17, 2019, 11:49:33 AM9/17/19
to BeagleBoard
Using two MCP23S17 I/O expanders via SPI1 with CS0 P9.28 and CS1 P9.42. 
I am initializing each chip separately and doing a read immediately after, which produces the expected data. However, if I go back to read the first chip after initializing the second chip, the data is skewed and doesn't read the first chip correctly. This happens even if I swap the order that the chips are initialized -- whichever one was initialized first ends up with skewed data.

Software or kernel issue?

Here is my code and the output:
https://pastebin.com/L6qJGwPZ


debian@beaglebone:~$ sudo /opt/scripts/tools/version.sh
[sudo] password for debian:
git:/opt/scripts/:[1aa73453b2c980b75e31e83dab7dd8b6696f10c7]
eeprom:[A335BNLTEIA04218BBBK0D06]
model:[TI_AM335x_BeagleBone_Black]
dogtag:[BeagleBoard.org Debian Image 2018-10-07]
bootloader:[eMMC-(default)]:[/dev/mmcblk1]:[U-Boot 2018.09-00002-g0b54a51eee]:[l                                        ocation: dd MBR]
kernel:[4.19.59-ti-rt-r25]
nodejs:[v6.14.4]
uboot_overlay_options:[enable_uboot_overlays=1]
uboot_overlay_options:[uboot_overlay_addr4=/lib/firmware/BB-SPIDEV1-00A0.dtbo]
uboot_overlay_options:[disable_uboot_overlay_video=1]
uboot_overlay_options:[disable_uboot_overlay_audio=1]
uboot_overlay_options:[uboot_overlay_pru=/lib/firmware/AM335X-PRU-RPROC-4-19-TI-                                        00A0.dtbo]
uboot_overlay_options:[enable_uboot_cape_universal=1]
pkg check: to individually upgrade run: [sudo apt install --only-upgrade <pkg>]
pkg:[bb-cape-overlays]:[4.4.20190812.0-0rcnee0~stretch+20190812]
pkg:[bb-wl18xx-firmware]:[1.20180517-0rcnee0~stretch+20180517]
pkg:[kmod]:[23-2rcnee1~stretch+20171005]
pkg:[librobotcontrol]:[1.0.3-git20181005.0-0rcnee0~stretch+20181005]
pkg:[firmware-ti-connectivity]:[20170823-1rcnee1~stretch+20180328]
groups:[debian : debian adm kmem dialout cdrom floppy audio dip video plugdev us                                        ers systemd-journal i2c bluetooth netdev cloud9ide gpio pwm eqep admin spi tisdk                                         weston-launch xenomai]
cmdline:[console=ttyO0,115200n8 bone_capemgr.uboot_capemgr_enabled=1 root=/dev/m                                        mcblk1p1 ro rootfstype=ext4 rootwait coherent_pool=1M net.ifnames=0 quiet]
dmesg | grep pinctrl-single
[    1.404225] pinctrl-single 44e10800.pinmux: 142 pins, size 568
dmesg | grep gpio-of-helper
[    1.428047] gpio-of-helper ocp:cape-universal: ready
END


debian@beaglebone:~/bb.org-overlays/src/arm$ cat BB-SPIDEV1-00A0.dts
/*
 * Copyright (C) 2013 CircuitCo
 *
 * Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;
/plugin/;
#include <dt-bindings/board/am335x-bbw-bbb-base.h>
#include <dt-bindings/pinctrl/am33xx.h>
/ {
        compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
        /* identification */
        part-number = "BB-SPIDEV1";
        version = "00A0";
        /* state the resources this cape uses */
        exclusive-use =
                /* the pin header uses */
                "P9.31",        /* spi1_sclk */
                "P9.29",        /* spi1_d0 */
                "P9.30",        /* spi1_d1 */
                "P9.28",        /* spi1_cs0 */
                "P9.42",        /* spi1_cs1 */
                /* the hardware ip uses */
                "spi1";
        /*
         * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
         */
        fragment@0 {
                target-path="/";
                __overlay__ {
                        chosen {
                                overlays {
                                        BB-SPIDEV1-00A0 = __TIMESTAMP__;
                                };
                        };
                };
        };
        /*
         * Free up the pins used by the cape from the pinmux helpers.
         */
        fragment@1 {
                target = <&ocp>;
                __overlay__ {
                        P9_28_pinmux { status = "disabled"; };  /* spi1_cs0 */
                        P9_30_pinmux { status = "disabled"; };  /* spi1_d0 */
                        P9_29_pinmux { status = "disabled"; };  /* spi1_d1 */
                        P9_31_pinmux { status = "disabled"; };  /* spi1_sclk */
                        P9_42_pinmux { status = "disabled"; };  /* spi1_cs1 */
                };
        };
        fragment@2 {
                target = <&am33xx_pinmux>;
                __overlay__ {
                        /* default state has all gpios released and mode set to uart1 */
                        bb_spi1_pins: pinmux_bb_spi1_pins {
                                pinctrl-single,pins = <
                                        0x190 0x33      /* mcasp0_aclkx.spi1_sclk, INPUT_PULLUP | MODE3 */
                                        0x194 0x33      /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
                                        0x198 0x13      /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
                                        0x19c 0x13      /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
                                        0x164 0x12      /* eCAP0_in_PWM0_out.spi1_cs1 OUTPUT_PULLUP | MODE2 */
                                >;
                        };
                };
        };
        fragment@3 {
                target = <&spi1>;
                __overlay__ {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "okay";
                        pinctrl-names = "default";
                        pinctrl-0 = <&bb_spi1_pins>;
                        ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
                        num-cs = <2>;
                        //cs-gpios = <0>, <1>;
                        channel@0 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "spidev";
                                symlink = "spi/1.0";
                                reg = <0>;
                                spi-max-frequency = <16000000>;
                                spi-cpha;
                        };
                        channel@1 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "spidev";
                                symlink = "spi/1.1";
                                reg = <1>;
                                spi-max-frequency = <16000000>;
                                //spi-cpha;
                        };
                };
        };
};

Robert Nelson

unread,
Sep 17, 2019, 11:57:52 AM9/17/19
to Beagle Board, britch...@gmail.com
On Tue, Sep 17, 2019 at 10:49 AM bRitch022 <britch...@gmail.com> wrote:
>
> Using two MCP23S17 I/O expanders via SPI1 with CS0 P9.28 and CS1 P9.42.
> I am initializing each chip separately and doing a read immediately after, which produces the expected data. However, if I go back to read the first chip after initializing the second chip, the data is skewed and doesn't read the first chip correctly. This happens even if I swap the order that the chips are initialized -- whichever one was initialized first ends up with skewed data.
>
> Software or kernel issue?

Try again using the MCP23S17 bindings and the pinctrl-mcp23s08 driver:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt

Regards,

--
Robert Nelson
https://rcn-ee.com/

Robert Nelson

unread,
Sep 17, 2019, 12:26:43 PM9/17/19
to Beagle Board, Bryan Ritchie
On Tue, Sep 17, 2019 at 11:20 AM Bryan Ritchie <britch...@gmail.com> wrote:
>
> Robert,
>
> Am I placing a paragraph like this in the SPIDEV1 dts (dtbo) file? Or am I creating a new BB-SPI1-MCP23S17-00A0.dts file?

Sure, that name would be fine, but I would first start with this example:

https://github.com/beagleboard/bb.org-overlays/blob/master/src/arm/BB-SPI0-MCP23S08-00A0.dts

Then change it to SPI1 and tweak the node to match the mcp23s17..

Robert Nelson

unread,
Sep 17, 2019, 3:22:56 PM9/17/19
to Beagle Board, Bryan Ritchie
On Tue, Sep 17, 2019 at 12:55 PM Bryan Ritchie <britch...@gmail.com> wrote:
>
> Robert,
>
> This caused my spidev1.0 and spidev1.1 to disappear.

Yes, that's good.. you can use the gpiolib/etc instead of hacking thru spidev..

>
> Here's what I compiled:
> /*
> * Copyright (C) 2015 Robert Nelson <robert...@gmail.com>
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> * published by the Free Software Foundation.
> */
>
> /dts-v1/;
> /plugin/;
>
> #include <dt-bindings/board/am335x-bbw-bbb-base.h>
> #include <dt-bindings/pinctrl/am33xx.h>
>
> / {
> compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
>
> /* identification */
> part-number = "BB-SPI1-MCP23S17";
> version = "00A0";
>
> /* state the resources this cape uses */
> exclusive-use =
> /* the pin header uses */
> "P9.31", /* spi1_sclk, SPI1_SCLK */
> "P9.29", /* spi1_d0, SPI1_MISO */
> "P9.30", /* spi1_d1, SPI1_MOSI */
> "P9.28", /* spi1_cs0, CS0 */
> "P9.42", /* spi1_cs1, CS1 */
> /* the hardware ip uses */
> "spi1";
>
> /*
> * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
> */
> fragment@0 {
> target-path="/";
> __overlay__ {
>
> chosen {
> overlays {
> BB-SPI1-MCP23S17-00A0 = __TIMESTAMP__;
> };
> };
> };
> };
>
> /*
> * Free up the pins used by the cape from the pinmux helpers.
> */
> fragment@1 {
> target = <&ocp>;
> __overlay__ {
> P9_28_pinmux { status = "disabled"; }; /* spi1_cs0 */
> P9_30_pinmux { status = "disabled"; }; /* spi1_d1 */
> P9_29_pinmux { status = "disabled"; }; /* spi1_d0 */
> P9_31_pinmux { status = "disabled"; }; /* spi1_sclk */
> P9_42_pinmux { status = "disabled"; }; /* spi1_cs1 */
> };
> };
>
> fragment@2 {
> target = <&am33xx_pinmux>;
> __overlay__ {
> bb_spi0_pins: pinmux_bb_spi0_pins {

This label name doesn't match below... (aka: bb_spi1) replace ^ spi0
with spi1...

> pinctrl-single,pins = <
> BONE_P9_31 (PIN_INPUT_PULLUP | MUX_MODE3) /* spi1_sclk.spi1_sclk */
> BONE_P9_29 (PIN_INPUT_PULLUP | MUX_MODE3) /* spi1_d0.spi1_d0 */
> BONE_P9_30 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* spi1_d1.spi1_d1 */
> BONE_P9_28 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* spi1_cs0.spi1_cs0 */
> BONE_P9_42 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* spi1_cs1.spi1_cs1 */
> >;
> };
> };
> };
>
> fragment@3 {
> target = <&spi1>;
> __overlay__ {
> #address-cells = <1>;
> #size-cells = <0>;
>
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&bb_spi1_pins>;
>
> gpiom1: gpio@0 {
> compatible = "microchip,mcp23s17";
> gpio-controller;
> #gpio-cells = <2>;
> microchip,spi-present-mask = <0x01>;
> mcp,spi-present-mask = <0x01>;
> spi-present-mask = <0x01>;
> reg = <0>;
> spi-max-frequency = <1000000>;
> };
>
> gpiom2: gpio@1 {
> compatible = "microchip,mcp23s17";
> gpio-conroller;

spelling: gpio-controller

> #gpio-cells = <2>;
> microchip,spi-present-mask = <0x01>;
> mcp,spi-present-mask = <0x01>;
> spi-present-mask = <0x01>;
> reg = <1>;
> spi-max-frequency = <1000000>;
> };
> };
> };
> };
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