PCIe on Beagleboard-XM

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Rajendra Prasad

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Apr 5, 2012, 3:34:57 AM4/5/12
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Hi,
  Can someone suggest me how can I have a PCIe interface on Beagleboard-XM, using expansion slot.
 
Thanks & Regards,
Rajendra

Gerald Coley

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Apr 5, 2012, 9:40:39 AM4/5/12
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 It would require an FPGA for sure. There isn't a bus available on the expansion header that would give good enough throughput. You may be able to use the 8 bit MMC bus. That is the fastest thing available.
 
Gerald


 
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Rajendra Prasad

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Apr 19, 2012, 7:06:45 AM4/19/12
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Hi Gerald,
 Thanks for the reply.
 I am new to PCIe. Please bear with me.
 
 PCIe requires 18 pins for 1x, 32 pins for 4x and so on. But there are only 8MMC pins avaliable.
 If my understanding is correct, FPGA will implement the PCIe core, and from the processor I can access just the data from FPGA using 8 bit MMC lines. Is my understanding correct?
 If multiple slaves devices have to be connected to the FPGA, how can I access the configuration space in PCIe?
 
Thanks & Regards,
Rajendra
 

On Thursday, April 5, 2012 7:10:39 PM UTC+5:30, Gerald wrote:
 It would require an FPGA for sure. There isn't a bus available on the expansion header that would give good enough throughput. You may be able to use the 8 bit MMC bus. That is the fastest thing available.
 
Gerald


 
On Thu, Apr 5, 2012 at 2:34 AM, Rajendra Prasad <rajen...@gmail.com> wrote:
Hi,
  Can someone suggest me how can I have a PCIe interface on Beagleboard-XM, using expansion slot.
 
Thanks & Regards,
Rajendra

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Andrew Bradford

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Apr 19, 2012, 7:30:06 AM4/19/12
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On Thu, 19 Apr 2012 04:06:45 -0700 (PDT)
Rajendra Prasad <rajen...@gmail.com> wrote:

> PCIe requires 18 pins for 1x, 32 pins for 4x and so on. But there are only
> 8MMC pins avaliable.

But in 1x, there's only 2 sets of pins that need to drive really really
fast, for the data in each direction. The rest of the pins are quite a
bit slower. These 2 sets of fast pins are the "hard part". :)

> If my understanding is correct, FPGA will implement the PCIe core, and
> from the processor I can access just the data from FPGA using 8 bit MMC
> lines. Is my understanding correct?

I think what Gerald was saying (and maybe what you are saying, too) is
that you'll need an FPGA connected to the processor via the MMC 8 bit
data bus. Then that FPGA can use it's PCIe ability to
actually run the PCIe bus where you will plug your devices. You'll
have a custom interface from the SoC to the FPGA to tell it what to do
with the PCIe bus.

> If multiple slaves devices have to be connected to the FPGA, how can I
> access the configuration space in PCIe?

You will need to make your FPGA capable of exporting this info over the
MMC bus. It'll probably need to be a custom set of RTL code, I've not
heard of anyone trying to do this before. But, if you are successful,
I'm sure there's a market for it, there's a ton of PCIe devices out
there and having an easy way to hook them up to low cost SoCs could be
a nice little niche.

Creating the code to act as a PCIe root port is not easy. I do believe
that Altera and Xilinx have soft cores to do this now in their FPGAs,
but I'm not sure of the cost. If you go forward with this, I think
buying a soft core PCIe root port from a vendor and then customizing it
to support your MMC interface would be the way to go. You'll also
need to write some Linux drivers so that PCI can show up
through the MMC interface, if you're going to use Linux.

-Andrew

Gerald Coley

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Apr 19, 2012, 9:49:54 AM4/19/12
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Bottom line. You CANNOT use the processor to support PCIe. You need external logic.
 
Gerald


 
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Rajendra Prasad

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Apr 19, 2012, 10:21:54 AM4/19/12
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Hi Andrew,
 Thanks for your valuable inputs.
 I will explore the options you have suggested.
 
 Gerald,
  I understand the processor limitation wrt PCIe.
  Thanks for your inputs
 
Thanks & Regards,
Rajendra
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