I have been able to load/start/run/stop a PRU core from 4.4.30-ti-r64 using just the uio_pruss (& uio) drivers, without any of the prussdrv code. Big milestone in my project.
it *appears* to me that this example (to teach/illustrate proper use of pru in the BB family) works only by luck - or taking advantage of some bit of information that is undocumented (from my research).
Specifically, when using the L3 DDR (main) memory to share data between the A8 and PRU, it seems that rather than using the 256KiB size region starting at 0x9c94_0000 (on my BBB rev C) it seems to simply hardcode 0x8000_0000 and write away. See here:
static int LOCAL_exampleInit () {
void *DDR_regaddr;
/* open the device */
mem_fd = open("/dev/mem", O_RDWR);
if (mem_fd < 0) {
printf("Failed to open /dev/mem (%s)\n", strerror(errno));
return -1;
}
/* map the memory */
ddrMem = mmap(0, 0x0FFFFFFF, PROT_WRITE | PROT_READ, MAP_SHARED, mem_fd, DDR_BASEADDR);
if (ddrMem == NULL) {
printf("Failed to map the device (%s)\n", strerror(errno));
close(mem_fd);
return -1;
}
//FLush the flag locations of PRU0 and PRU1
DDR_regaddr = ddrMem;
*(unsigned long*) DDR_regaddr = 0x00;
DDR_regaddr = ddrMem + 0x000000004;
*(unsigned long*) DDR_regaddr = 0x00;
return(0);
}
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I can understand how this might work "by accident" if these first eight bytes in DDR are not used. But that's not a good example.
Questions:
1) Is there some "magic" to this physical memory location that I'm missing out on? Or am I mis-reading the code, and it is *not* just writing to physical memory 0x0-0x7?
2) Is it correct that the actual DDR physical memory region that is allocated by the uio driver is properly determined by examining /sys/class/uio/uio<n>/maps/map1/{addr,size}? If not, how?
I think this is useful information that would be helpful to others if provided. Perhaps even an update to the example, if my assertions are correct. |