CA-Petaluma-Senior-ASIC-Designer--BSEE,-MSEE,-ASIC,-RTL,-VHDL,-Verilog-RTL,-Telecom,-Dat-

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Job ID: Jobsquare.JS-tsc.9265
Company Name: TECHS.COM
Job Title: Senior ASIC Designer
Country: UNITED STATES
State: CA
City: Petaluma
Experience:
More than Not Listed work experience.
Salary Range: Negotiable
Post Date: 17-04-2001

Skill Requirement :
BSEE, MSEE, ASIC, RTL, VHDL, Verilog RTL, Telecom, Dat

Job Description :
North Bay company that creates optical communication systems is currently in need
of a Senior ASIC Designer to be responsible for specification of ASIC Module functions,
RTL design and Verification with Verisity E language, Synthesys with Synopsys
Design Compiler, and Static Timing Analysis with Synopsys Prime Time.Candidates
must have a BSEE (MSEE is preferred) or equivalent, along with 5+ years of
related experience. Knowledge of VHDL or Verilog RTL Programming is essential
for this position. Candidates must have knowledge of Functional Simulation Techniques.
Knowledge of Telecom/Datacom logic design is required. Experience with
SONET or SDH is desired. Synopsys, Cadence, and Verisity tools are considered
a plus. Familiarity with NT and UNIX environments is a plus.This company offers
highly competitive salaries, and a full benefits program which includes medical,
dental, life, 401k, and pre-IPO stock options. This company appreciates the
balance between work life and home life, and offers lifestyle benefits such as flexible
hours, social activities, and health club memberships.

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