Learning system verilog

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KP

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Mar 23, 2009, 10:06:33 PM3/23/09
to Advanced Verification Methodology User Group
Hi,

I was wondering if someone could recommend a good system verilog book,
I have used VERA and SystemC in the past but would like to learn
system verilog.

It would be also good if the book and a optional companion design you
could buy, so
I could run through some examples.

Is there a free system verilog simulator out there.

I get a lot more out of reading the book if I can get hands on with
it.

Thanks,

KP

Glasser, Mark

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Mar 23, 2009, 10:14:48 PM3/23/09
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Hi KP,

There are a number of good books out -- go to amazon.com and search for
"systemverilog". I've found "SystemVerilog for Verification" by Chris
Spear to be a good introduction to the language, particularly if you are
already familiar with Verilog.

-- Mark

Ray Salemi

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Mar 23, 2009, 11:05:00 PM3/23/09
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Hi KP,

I wrote a book on FPGA Simulation that provides an introduction to SystemVerilog verification using a small subset of the OVM.  The book is called FPGA Simulation and you can get it at www.fpgasimulation.com.

Ray
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