Hello Ramdas,
Ideally it should be working in VCS because OVM is supported in
cadence and Mentors simulator(which are following systemVerilog IEEE
standards).
So any simulator which can support IEEE SystemVerilog, should be
supporting OVM.
Practically I have not yet gone through OVM as such.
Thanks
Manmohan Singh
On May 22, 4:09 pm, Puneet <
er.pu...@gmail.com> wrote:
> Hi,
>
> I think the reason is VCS does not support parameterized classes and
> in AVM/OVM all the base classes are parameterized.
>
> Thanks,
> Puneet
>
>
>
> On Thu, May 22, 2008 at 3:55 PM, pankaj kamboj <
pankajkambo...@gmail.com> wrote:
> > Hi Ramdas,
> > No, it will not work with VCS.It will work on Mentor's
> > Questa and cadence(don't know tol.plz check on website)
>
> > On 5/21/08, Ramdas <
mram...@gmail.com> wrote:
>
> >> Am new to learning OVM
> >> Has any one tried OVM with synopsys VCS? Is it known to work?
>
> >> /Ramdas- Hide quoted text -
>
> - Show quoted text -